Description
Laying out a power supply design is crucial for its proper operation; there are many issues to consider when translating a schematic into a physical product. This topic will address methods to keep circuit parasitic components from degrading the operation of your designs. Techniques to minimize the impact of parasitic inductance and capacitance of filter components and PWB traces will be discussed, together with a description of the impact that PWB trace resistance can have on power supply regulation and current capacity.

A general overview of thermal design is also included as well as sample temperature rise calculations in a natural and forced-air environment. Finally, some practical examples of power stage and control IC layouts are reviewed.

Objective

Key Learning

Course Modules
1. Module 01(ATECH3-4)