Email

Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS / PRU-ICSSG) Training Series

The Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS / PRU-ICSSG) is a small processor that is tightly integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices including the AM335x, AM437x, AM57x, and AM65x Sitara Processors. The PRU-ICSS / PRU-ICSSG is customer-programmable and can be used to implement simple and flexible control functions, peripherals, and state machines that directly access IO pins of the device, as well as can communicate with the application cores. It can also be used for industrial applications using the ICSS / ICSSG and a Sitara Industrial Development Kit (IDK). This curriculum provides an in-depth look at the PRU-ICSS / ICSSG, including hardware, firmware, application design, and drivers. It also examines the tools provided by TI for compiling and debugging the PRU.

1. Sitara™ Processors Building Blocks for PRU Development

TI's Building Blocks for PRU Development online training includes an overview of the PRU subsystem, device and IO integration, application design, and programming model.

# Title Duration
1.1 Introduction to the Programmable Real-Time Unit (PRU) Training Series
This short video provides an introduction of the PRU training series including how to access the series page and a curriculum overview.
02:27
1.2 Sitara™ Processors Building Blocks for PRU Development Summary
This session provides an overview of the Programmable Real-Time Unit (PRU) subsystem, device and IO integration, and programming model.
1.3 Sitara™ Processors Building Blocks for PRU Development: Hardware
The Programmable Real-Time Unit is a small processor that is integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devi...
1.4 Sitara™ Processors Building Blocks for PRU Development: Firmware
The Programmable Real-Time Unit is a small processor that is integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devi...
1.5 Sitara™ Processors Building Blocks for PRU Development: Designing a PRU Application
The Programmable Real-Time Unit (PRU) is a small processor that is integrated with an IO subsystem, offering low-latency control on TI’s SoC devices
Login required

2. Tools for PRU Development

TI provides software and tools for developing PRU applications on supported TI processors. Tools for PRU Development includes information on how to get started debugging the PRU using Code Composer Studio (CCS), how to rebuild PRU firmware on the target board, as well as tips and tricks for using the PRU C/C++ Compiler, including recommendations and things to avoid when using loops, links, registers, arguments, and constant tables.

# Title Duration
2.1 Sitara™ Processors: Debug PRU Using Code Composer Studio (CCS)
This presentation provides a step-by-step process on how to get started debugging the Programmable Real-Time Unit (PRU) using Code Composer Studio (CCS)....
2.2 Sitara™ Processors: Programmable Real-Time Unit (PRU) Compiler Tips & Tricks
This presentation provides tips and tricks for using the Programmable Real-Time Unit (PRU) C/C++ Compiler, including recommendations.
2.3 PRU-ICSS: Interfacing a processor with multiple ADCs
This video demonstrates how the PRU-ICSS subsystem can provide flexible interface between the processor and multiple ADCs.
02:34
2.4 Rebuilding PRU Firmwares on Target Using Sitara Processors
This video demonstrates how to install and use the PRU C compiler on Sitara Processor evaluation modules for AM57x, AM437x, and AM335x.
08:24
Login required

3. Running Industrial Protocols on PRU

This section provides an introduction to PRU-ICSS protocols, which are built on top of Processor SDK to enable real-time industrial communications for TI Sitara embedded processors. 
# Title Duration
3.1 Demonstrating EtherCAT Master on Sitara AM57x Gb Ethernet and PRU-ICSS
This video demonstrates the EtherCAT reference design on Sitara AM57x Gb Ethernet and PRU-ICSS with Time-Triggered Send.
10:31
3.2 Demonstrating Simple Open Real-Time Ethernet Protocol (SORTE) Master and Slave on PRU-ICSS using Processor SDK RTOS
This video demonstrates the Simple Open Real-Time Ethernet Protocol (SORTE) Master and Slave implementation on PRU-ICSS using Processor SDK RTOS.
13:28
3.3 Enabling Multi-protocol Industrial Ethernet with the PRU-ICSS on TI's Sitara™ Processors
In this webinar, learn how you can leverage Multi-protocol industrial Ethernet support with Sitara™ processor portfolio in your design.
44:04
3.4 IEC 62439-3 HSR/PRP Implementation on Sitara™ Processors using PRU-ICSS
This training provides an overview of the IEC6249-5 High-Availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP) implementation on...
Login required

4. Introduction to PRU-ICSSG

This section provides an overview of the PRU-ICSSG for Gigabit-speed industrial subsystems.
# Title Duration
4.1 Programmable Real-time Unit for Gigabit Industrial Communication Subsystem (PRU_ICSSG) Overview
This training provides an introduction to the PRU-ICSSG, including hardware basics, feature comparisons to PRU-ICSS, and new applications supported.
06:49
Login required
arrow-topclosedeletedownloadmenusearchsortingArrowszoom-inzoom-out arrow-downarrow-uparrowCircle-leftarrowCircle-rightblockDiagramcalculatorcalendarchatBubble-doublechatBubble-personchatBubble-singlecheckmark-circlechevron-downchevron-leftchevron-rightchevron-upchipclipboardclose-circlecrossReferencedashdocument-genericdocument-pdfAcrobatdocument-webevaluationModuleglobehistoryClockinfo-circlelistlockmailmyTIonlineDataSheetpersonphonequestion-circlereferenceDesignshoppingCartstartoolsvideoswarningwiki