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DS90UB953/954 System Design & Operation

The DS90UB953/954 System Design & Operation video series offers training for FPD-Link III devices for ADAS.  FPD-Link III devices such as the DS90UB953-Q1/ DS90UB954-Q1 support sensor use over serial link for Advanced Driver Assist Systems (ADAS) in the automotive industry.  In this training series, we will guide you through step-by-step procedures to initialize and bring-up the “Sensor-Serializer-Deserializer-ISP” link to an optimal performance level. 

We will cover strategies through several flow charts and mention “tips and tricks” to address system challenges citing example of an ADAS serial link implemented using DS90UB953 and DS90UB954: (1) the link between the serializer and deserializer, (2) the link between the serializer and sensor, and (3) the link between the deserializer and Image Signal Processor (ISP). We will also cover a basic overview of the FPD-Link III devices for ADAS as well as the hardware checks that go into a DS90UB953/954 system.

1. DS90UB953/954 System Design & Operation: Overview

This introduction video will give the background on FPD-Link III devices, such as the DS90UB953-Q1/ DS90UB954-Q1; the device's role within Advanced Driver Assist Systems (ADAS) in the automotive industry; and explain their broad appeal to engineers of all experience levels. This is fundamental to diving deeper into a 953/954 system, as well as, the links within the system.

Specifically, this section will discuss: FPD-Link ADAS Applications, Designing Healthy Links, ADAS FPD-Link Portfolio, System Block Diagram, 954 Block Diagram, 953 Block Diagram, Detailed System Block Diagram, and Cables and Connectors.

 

# Title Duration
1.1 DS90UB953/954 System Design & Operation: Introduction
DS90UB953/954 Design Operation training series overview basics for understanding FPD-Link™ III devices within Advanced Driver Assist Systems (ADAS)
06:11
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2. DS90UB953/954 System Design & Operation: Typical Customer Issues

This section frames the design and operation video series by showing why it is important to contextualize customer problems in terms of the links between the devices. 

Specifically, this section will discuss: issues with initializing the camera and issues with reading the incorrect serializer ID from the deserializer.

# Title Duration
2.1 DS90UB953/954 System Design & Operation: Typical Customer Issues
This video discusses system design and operation from the point of view of a customer.
01:49
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3. DS90UB953/954 System Design & Operation: Basic Design Rules

Understanding what hardware and software settings are important is critical to establishing a foundation for the 953/954 system. These settings can occur during or after power up and may need to be changed via software. As a result, these settings are routinely checked and verified before checking any of the other links in the system.

Specifically, this sections discusses: Diagnostics post power up, Mode and IDX Pins, Clocking Modes between the 953/954, Aliasing, I2C Pass Through, Port selection on 954, Analog Launch Pad (ALP), and Successful I2C Communication

# Title Duration
3.1 DS90UB953/954 System Design & Operation: Basic Design Rules 1
This video discusses the importance of checking a system after power up, as well, what specific items to check for the DS90UB953 and DS90UB954.
03:27
3.2 DS90UB953/954 System Design & Operation: Basic Design Rules 2
This video discusses the clocking modes that can be used with the 953 & 954 as well as calculations for data rate.
05:07
3.3 DS90UB953/954 System Design & Operation: Basic Design Rules 3
This video discusses various settings on the 953 and 954 that need to be configured before the devices can properly communicate with each other.
04:03
3.4 DS90UB953/954 System Design & Operation: Basic Design Rules 4
This video discusses how to verify the settings discussed in previous videos using software.
04:03
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4. DS90UB953/954 System Design & Operation: 953-954 Link Design

This section analyzes the link between the 953 and 954 and establishes how to identify the health and operation of the link. Since the link between the 953-954 is the most fundamental link used to communicate between devices, it is often checked first.

Specifically, this section discusses: Back Channel configuration, Built in Self Test (BIST), Adaptive Equalization (AEQ), and Channel Monitor Loop (CMLOUT)

# Title Duration
4.1 DS90UB953/954 System Design & Operation: 953-954 Link Design
This video discusses how to verify the health of 953-954 link, as well as, the specific settings to check when establishing the link.
05:57
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5. DS90UB953/954 System Design & Operation: Sensor-953 Link Design

This is the Sensor and 953 Link Design section in DS90UB953/954 System Design & Operation video series. This video discusses how to use the sensor-953 link, as well as, the specific settings that are used with this link.

Specifically, this section discusses: Sensor Initialization using I2C, GPIO for Reset and Power Down, and CLKOUT.

# Title Duration
5.1 DS90UB953/954 System Design & Operation: Sensor-953 Link Design
This video discusses how to use the sensor-953 link, as well as, the specific settings that are used with this link.
03:48
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6. DS90UB953/954 System Design & Operation: 954-ISP/SoC Link Design

This section discusses what frame synchronization (FrameSync) is and how to configure in on the 953 and 954 and how CSI2 data is transferred across the link from the 954 to the ISP/SoC

Specifically, this section discusses: Frame Synchronization (FrameSync), Controlling 953 GPIOs locally and remotely via I2C, Unsynchronized and synchronized sensors, Internal and External Frame Sync, Port Forwarding, Accessing Indirect Registers, and Pattern Generation on 953 & 954

# Title Duration
6.1 DS90UB953/954 System Design & Operation: 954-ISP/SoC Link Design 1
This video discusses what frame synchronization (FrameSync) is and how to configure it on the 953 and 954.
09:29
6.2 DS90UB953/954 System Design & Operation: 954-ISP/SoC Link Design 2
This video discusses how CSI2 data is transferred across the link from the 954 to the ISP/SoC.
04:33
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7. DS90UB953/954 System Design & Operation: Hardware Design

This section discusses how design a 953/954 using Power over Coax (PoC), and various hardware checks and concepts that need to be considered when analyzing a 953/954 system.

Specifically, this section discusses: Power Over Coax (PoC), AC Coupling Capacitors, PoC Inductors, Typical PoC Schematic, Critical Signal Routing, I2C Pullups, Loop Filter Capacitors on 953, Insertion Loss, Return Loss, and Time Domain Reflection (TDR) measurements.

# Title Duration
7.1 DS90UB953/954 System Design & Operation: Hardware Design 1
This video discusses how design a 953/954 using Power over Coax (PoC)
05:04
7.2 DS90UB953/954 System Design & Operation: Hardware Design 2
This video discusses various hardware checks and concepts that need to be considered when analyzing a 953/954 system
05:12
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