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EtherCAT® Master on Sitara™ Processors Training Series

This training presents TI’s ready-to-use EtherCAT masters solutions for Sitara processors. EtherCAT master on Sitara runs on different operating systems, including TI-RTOS and RT Linux. It also runs on the EMAC interfaces (CPSW and PRU ICSS_EMAC) of any Sitara device, including AM57x, AM437x, and AM335x.

1. EtherCAT Master on Sitara Processors

This section looks at how Sitara processors fit into the different factory automation levels and provides an introduction to the EtherCAT technology. It also creates an essential understanding of two commercial EtherCAT masters (Acontis EC-Master and CoDeSys 3S) and shows how these masters work on top of the Sitara hardware and software framework. We explain the PRU-ICSS Time Triggered Send (TTS) and how TTS can be used along with EtherCAT master for applications that require precision time. This section concludes with a summary of why Sitara is the ideal scalable and flexible solution for EtherCAT master.

# Title Duration
1.1 EtherCAT Master on Sitara Processors: Factory Automation + EtherCAT Protocol Overview
This training provides an overview of the EtherCAT Master on Sitara processors training series
09:14
1.2 EtherCAT Master on Sitara Processors: Acontis and CoDeSys EtherCAT Master Software Architectures
This EtherCAT Master on Sitara processors training examines both the Acontis EtherCAT master software architecture
08:54
1.3 EtherCAT Master on Sitara Processors: Time-Triggered Send (TTS) and Sitara Scalability
This EtherCAT Master on Sitara processors training provides an introduction to Time-Triggered Send (TTS).
05:15
1.4 Demonstrating EtherCAT Master on Sitara AM57x Gb Ethernet and PRU-ICSS
This video demonstrates the EtherCAT reference design on Sitara AM57x Gb Ethernet and PRU-ICSS with Time-Triggered Send.
10:31
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