Get Your Clocks in Sync: Hardware Setup
00:02:30
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26 MAR 2019
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs
Resources
This video is part of a series
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Clocking solutions for high-speed multi-channel applications
video-playlist (6 videos)