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High Speed Signal Chain University

High Speed Signal Chain University is your portal to relevant training material on High Speed Data Converters and High Speed Amplifiers including topics related to RF Sampling Converters, JESD204B SerDes standard, and RF Fundamentals.

1. JESD204B Video Blog Series

The JESD204B video blog series explores the basic concepts related to the JESD204B SerDes standard in relation to High Speed Data Converter products.

# Title Duration
1.1 Why Use a JESD204B Device?
This video introduces the advantages that the JESD204B standard provides in high speed data converters.
03:26
1.2 Selecting a JESD204B Subclass
This video discusses the three subclass modes in the JESD204B standard.  The pros and cons of operating in each subclass is discussed.
05:14
1.3 Talk like a Pro - Data Flow
This video illustrates the block diagram of the JESD204B SERDES transceiver.  The function of the individual blocks is described.
03:54
1.4 JESD204B Physical Layer
This video describes the JESD204B physical layer and the impact on channel integrity.  Mitigation techniques utilizing pre-emphasis and de-emphasis are...
06:39
1.5 JESD204B: Transport Layer
This video addresses the transport layer of JESD204B standard specifically breaking down how the data converters digital data is mapped into the SerDes...
04:12
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2. RF Sampling Series

This series explores the new realm of RF sampling converters for use in high frequency, large bandwidth systems.

# Title Duration
2.1 Introduction to the RF Sampling Architecture
Introduction to the RF sampling architecture in contrast to traditional direct conversion architectures typically used in existing transceivers.
03:21
2.2 Why RF Sampling
This video specifically addresses the benefits and advantages RF sampling provides that was limited or not possible with existing technology.
03:15
2.3 RF Sampling: Managing Data Rates
RF Sampling requires fast sampling rates, but the input data rates usually cannot keep pace.  The techniques to mitigate those limitations are address...
03:40
2.4 Understanding Clock Jitter Impact to ADC SNR
This video discusses the sampling clock phase noise performance and how its performance over frequency offset impacts the GSPS ADC SNR performance.
02:57
2.5 ADC32RF80: RF Sampling Telecom Receiver Quick-Start
The ADC32RF80 telecom receiver is a dual channel, 14-bit, 3-GSPS ADC with integrated dual DDC (Digital Down Converter). This video shows how to get up-and-running...
07:50
2.6 ADC32RF45: 1-GHz Bandwidth RF Sampling Solution
The ADC32RF45 RF Sampling ADC is a dual channel, 14-bit, 3-GSPS ADC. This video showcases how the RF sampling device supports 1-GHz signal bandwidths and...
05:04
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3. Advanced JESD204B Topics

This series explores advanced topics related to the JESD204B SerDes standard associated with extending the link length and multi-device synchronization.

# Title Duration
3.1 Extending JESD204B Link on Low Cost Substrates
This video discusses the JESD204B SERDES standard related to minimum integrity to maintain proper eye diagram.  As the link length is extended, signal...
03:34
3.2 Synchronizing Multiple JESD204B ADCs
This video illustrates synchronizing two ADC12J4000 ADCs employing JESD204B interface with two separate FPGA capture solutions.
03:04
3.3 JESD204B training, part 1 of 3: Overview
An introduction to the JESD204B interface
46:05
3.4 JESD204B training, part 2 of 3: Debug, tools and tips
An overview of JESD204B debug, tools and tips
48:31
3.5 JESD204B training, part 3 of 3: Multi-device synchronization
An overview of JESD204B multi-device synchronization
30:13
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4. IMS2015 Demos

This series shows the demos presented at the TI presentation booth at the IMS2015 International Microwave Symposium in Phoenix, Arizona in May 2015.

# Title Duration
4.1 IMS2015 - BTS Demo
This showcases the BTS transceiver demo from IMS2015.  The transmitter is comprised of the DAC38J84 driving a TRF3722 modulator with integrated PLL/VCO...
01:13
4.2 IMS2015 - TSW54J60 Demo
This demo showcases the Dual 16-bit, 1 GSPS ADC (ADS54J60) with two different high bandwidth driver options.  On one channel the ADC is driven by the LMX3401...
01:19
4.3 IMS2015 - TSW12J54 Demo
This demo showcases the TSW12J54 reference design which includes the ADC12J4000 (4 GSPS, 12-bit ADC) driven by the LMX5401 very high bandwidth differential...
01:44
4.4 IMS2015 - JOOS Demo
JESD204B is a common standard for implementing a SerDes interconnection between FPGA/Processor and the data converter.  Because the SerDes is operating...
01:40
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5. General High-Speed Trainings

This series covers general updates on Texas Instruments' high-speed signal chain portfolio.

# Title Duration
5.1 High-Speed Signal Chain Update, 1H 2017
Learn about updates on our high-speed signal chain components for space, avionics and defense designs. 
19:50
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