AM6x Sitara™ processors


5.3 IEC 62439-3 HSR/PRP Implementation on Sitara™ Processors using PRU-ICSS


November 22, 2016

This training provides an overview of the IEC6249-5 High-Availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP) implementation on Sitara processors using TI’s Programmable Real-time Unit Industrial Communications Subsystem (PRU-ICSS) subsystem for industrial communication. It outlines the potential applications and benefits of implementation HSR and PRP in conjunction with the industrial software development kits provided for Sitara AM335x, AM437x, and AM57x processors, introduces the HSR PRP switch architecture and how it can be leveraged with the PRU-ICSS, and summarizes the operations and standards of both HSR and PRP. In addition, it also provides a quick look at Precision Time Protocol (PTP) and how it can be implemented in the same processor environment.

Launch the module.

PDFs for download

Additional information

This course is also a part of the following series

Date: April 15, 2017
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