Three-part JESD204B training series
This three-part training series introduces fundamentals and tips for leveraging the JESD204B serial interface standard, which provides board area, FPGA/ASIC pin-count and deterministic latency improvements over traditional LVDS and CMOS interfaces. TI’s JESD204B ADCs, DACs, clock ICs and development tools enable quick evaluation, design and implementation of designs utilizing the JESD204B interface. Learn more today through this on-demand series.
Table of contents
Questions? Visit the high-speed page of TI’s E2E Community for a quick response! Visit http://e2e.ti.com/support/data_converters/high_speed_data_converters/. If you click on a specific part, you can submit a question to the supporting team.
1. JESD204B overview
The introduction of the JESD204B interface for the use between data converters and logic devices has provided many advantages over previous-generation LVDS and CMOS interfaces – including simplified layouts, skew management and deterministic latency. However, understanding this interface and applying it to a signal chain design may seem like a daunting task. This training provides an overview of the important aspects of the JESD204B interface, and how it is used in real-world applications.
JESD204B training, part 1 of 3: Overview
An introduction to the JESD204B interface
|46:05||An introduction to the JESD204B interface|
2. JESD204B debug, tools and tips
While JESD204B offers various benefits, bringing up a link for the first time can be a challenge if not properly prepared. This training provides tips, guidelines, tools and examples that assist in the bring-up of a JESD204B interface link. Content includes: configuration planning, board schematic and layout guidelines, HSP JESD204B foundation tools and additional information.
JESD204B training, part 2 of 3: Debug, tools and tips
An overview of JESD204B debug, tools and tips
|48:31||An overview of JESD204B debug, tools and tips|
3. JESD204B multi-device synchronization
Multi-device synchronization has always been a challenge with ADCs and DACs. This remains true even with the new JESD204B high-speed data converter digital interface. While the JESD204B interface simplifies some issues with synchronization, it also adds some additional complexity. This presentation discusses the advantages and disadvantages of JESD204B regarding multi-device synchronization, and helps engineers understand and work through the main issues in achieving multi-device synchronization. Concepts and examples in this training will enable a system designer to: understand the requirements for synchronization in a JESD204B system, recognize tools available to achieve synchronization, and know the considerations for synchronizing giga-sample converters.
JESD204B training, part 3 of 3: Multi-device synchronization
An overview of JESD204B multi-device synchronization
|30:13||An overview of JESD204B multi-device synchronization|