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3.5 PRU-ICSS: Interfacing a processor with multiple ADCs

説明

2018年 4月 27日
TI's Sitara™ processors feature a unique subsystem, called the Programmable-Real-Time Unit Industrial Communications Subsystem (PRU-ICSS), which enables the integration of real-time industrial communications protocols and eliminates the need for an external ASIC or FPGA. This video demonstrates how the PRU-ICSS subsystem can provide flexible interface between the processor and multiple Analog-to-Digital Converters (ADCs) to enhance data acquisition performance. Tune is as we review the benefits of the PRU-ICSS and use a single PRU-ICSS to capture data from six 8-channel ADCs, sampling at 256ksps each.

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Date: 9月16日2016年
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