ヒント:複数の語句はコンマで区切ってください

入力例:06/19/2019

入力例:06/19/2019

ヒント:複数の語句はコンマで区切ってください

入力例:06/19/2019

入力例:06/19/2019

並べ替え:

32 結果
 The TIDA-01021 connected to the ADC12DJ3200EVM and LMX2594EVM.

複数クロックの同期:ハードウェア設定

日付:
2017年 12月 19日

所要時間::
02:31
このビデオはTIDA-01021 の 2 つのクロック出力間の DEV_CLK スキュー、2 個の ADC12DJ3200EVM のアナログ・チャネル間スキューを解説します。

Synchronizing Multiple JESD204B ADCs

日付:
2015年 6月 11日

所要時間::
03:04
This video illustrates synchronizing two ADC12J4000 ADCs employing JESD204B interface

Introduction to the RF Sampling Architecture

日付:
2015年 6月 29日

所要時間::
03:21
Introduction to the RF sampling architecture in contrast to traditional direct conversion architectures typically used in existing transceivers.

Why RF Sampling

日付:
2015年 6月 29日

所要時間::
03:15
This video specifically addresses the benefits and advantages RF sampling provides that was limited or not possible with existing technology.

RF Sampling: Managing Data Rates

日付:
2015年 6月 29日

所要時間::
03:40
RF Sampling requires fast sampling rates, but the input data rates usually cannot keep pace.  The techniques to mitigate those limitations are addressed.

Selecting a JESD204B Subclass

日付:
2015年 7月 15日

所要時間::
05:14
This video discusses the three subclass modes in the JESD204B standard.  The pros and cons of operating in each subclass is discussed.

High Speed Signal Chain University

High Speed Signal Chain University is your portal to relevant training material on High Speed Data Converters and High Speed Amplifiers including topics related to RF Sampling Converters, JESD204B SerDes standard, and RF Fundamentals.

Understanding Clock Jitter Impact to ADC SNR

日付:
2015年 7月 21日

所要時間::
02:57
This video discusses the sampling clock phase noise performance and how its performance over frequency offset impacts the GSPS ADC SNR performance.

ADC32RF45: 1-GHz Bandwidth RF Sampling Solution

日付:
2016年 5月 15日

所要時間::
05:04
The ADC32RF45 is a dual channel, 14-bit, 3-GSPS ADC. This video shows how the ADC32RF45 supports 1-GHz signal bandwidths and beyond for next generation systems.

How to read an SMD part number

日付:
2017年 2月 7日

所要時間::
04:39
Learn how to read a SMD (Standard Microcircuit Drawing) part number.

Get Your Clocks in Sync: Hardware Setup

日付:
2017年 8月 14日

所要時間::
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

Get Your Clocks in Sync: Software Setup

日付:
2017年 8月 7日

所要時間::
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Get Your Clocks in Sync for JESD204B Data Converters

日付:
2017年 9月 6日

所要時間::
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.

Digital Power Supply Design Workshop

When: 
2019年 5月 21日 09:00 in Garching, Germany
Laboratory based digital power supply design workshop providing design engineers an in-depth look at the design of modern, robust switch mode power supplies.

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 1

日付:
2018年 7月 17日

所要時間::
07:50
Learn about the high speed multi-channel clocking requirements and challenges.

How to synchronize high speed multi-channel clocks?

Modern high speed end equipment's like oscilloscope, 5G wireless communication tester and RADAR requires multichannel transceiver system. The biggest challenge is to provide the high frequency, low phase noise, multiple synchronized clocks to each transceiver's data converters and local oscillator. This training will explain how to synchronize the high speed multichannel clocks and expand for high channel count clocks requirement.

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 2

日付:
2018年 7月 25日

所要時間::
09:56
Learn about the JESD204B compliant high speed multichannel synchronized clocking architecture

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 3

日付:
2018年 7月 25日

所要時間::
11:22
Learn about the high channel count clocking solution.

Simplifying your space design

日付:
2018年 9月 25日

所要時間::
29:42
Learn how how TI’s new and upcoming space-grade products can help with the increasingly challenging requirements of space-based applications.

Solving bandwidth limitations with high speed converters

日付:
2018年 10月 31日

所要時間::
13:40
Achieve wider bandwidth, lower latency and higher density with TI's high speed data converters.
32 結果
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