Filters in use:
Filters in use:
Filters in use:
Filters in use:
Filters in use:
並べ替え：
Hands-on experiment: Crossover distortion on ADC drive
日付:
所要時間：:
2018年 1月 19日
所要時間：:
11:37
This hands-on experiment shows how the front-end driver impacts SAR ADC performance.
Hands-on experiment: Amplifier settling and charge bucket filter design
日付:
所要時間：:
2018年 3月 16日
所要時間：:
22:03
This hands-on experiment shows how to simulate ADC settling time and then measure the impact different amplifiers and charge buckets have on THD and SNR.
Hands-on experiment: Aliasing and anti-aliasing filters
日付:
所要時間：:
2018年 3月 6日
所要時間：:
24:55
This hands-on experiment demonstrates aliasing and the effect of anti-aliasing filters.
Hands-on experiment: ADC noise
日付:
所要時間：:
2018年 1月 19日
所要時間：:
16:35
This hands-on experiment shows how the front-end driver is impacted by resistor thermal noise.
Getting Started with the ADS8353 ADC Performance Demonstration Kit
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所要時間：:
2015年 9月 9日
所要時間：:
05:41
Learn how to set up the ADS8353 Performance Demonstration Kit (ADS8353EVM-PDK). The ADS8353 is a 16-bit, dual channel, simultaneous sampling 600 kSPS precision
Getting Started with the ADS7042 Ultra-Low Power Data Acquisition BoosterPack
日付:
所要時間：:
2016年 2月 25日
所要時間：:
03:59
The ADS7042 Ultra-Low Power Data Acquisition BoosterPack helps you quickly and easily evaluate the industry's smallest 12-bit, 1 MSPS SAR ADC. The ultra-sm
Getting Started With the ADS1298ECGFE-PDK
日付:
所要時間：:
2014年 11月 1日
所要時間：:
07:08
The ADS1298ECGFE-PDK Is A Tool For Quick Evaluation Of TI's New Data Converter For Biopotential Measurements. This Video Demonstrates The Steps Necessary To Ge
Getting Best Performance From Your GSPS and RF Sampling ADC Designs
日付:
所要時間：:
2017年 5月 8日
所要時間：:
28:42
This video will talk about matching networks and clocking requirements for GSPS and RF Sampling ADC Inputs.
Get Your Clocks in Sync: Software Setup
日付:
所要時間：:
2017年 8月 7日
所要時間：:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers
Get Your Clocks in Sync: Hardware Setup
日付:
所要時間：:
2017年 8月 14日
所要時間：:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs
Get Your Clocks in Sync for JESD204B Data Converters
日付:
所要時間：:
2017年 9月 6日
所要時間：:
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.
General high-speed trainings
This series covers general updates on our high-speed signal chain portfolio.
Gain impact on noise, ADC FSR and dynamic range
日付:
所要時間：:
2020年 9月 29日
所要時間：:
22:28
This module covers the impact gain has on noise performance.
Flexible interface (PRU-ICSS) for data acquisition using multiple ADCs
日付:
所要時間：:
2019年 6月 3日
所要時間：:
07:11
This video covers flexible interface between the PRU-ICSS and multiple ADCs to achieve simultaneous and coherent sampling (TIDA-01555).
Final SAR ADC drive simulations
日付:
所要時間：:
2017年 4月 14日
所要時間：:
06:36
This video shows the simulation results using the external R and C components from the previous videos.
Fast Fourier transforms (FFTs) and windowing
日付:
所要時間：:
2017年 4月 14日
所要時間：:
10:46
This video introduces the FFT as well as the concept of windowing to minimize error sources.
External EOS protection devices
日付:
所要時間：:
2018年 5月 1日
所要時間：:
10:33
This presentation covers a short review of external devices that can be used to protect data converters from electrical overstress.
Extending JESD204B Link on Low Cost Substrates
日付:
所要時間：:
2015年 6月 29日
所要時間：:
03:34
This video discusses the JESD204B SERDES standard related to minimum integrity to maintain proper eye diagram.
Error sources
These videos describe how to calculate the error and noise of analog-to-digital converters (ADCs).
EOS and ESD on ADC
日付:
所要時間：:
2019年 4月 6日
所要時間：:
16:00
This video starts with an introduction of electrical overstress, abbreviated EOS, and Electrostatic Discharge.