Precision temperature measurement with Delta-Sigma analog-to-digital converters

This video will go over what ADC SFDR's are, explain the concept of frequency planning and provide tools to help with RF sampling design. 

This hands-on experiment shows how to simulate ADC settling time and then measure the impact different amplifiers and charge buckets have on THD and SNR.

This hands-on experiment demonstrates aliasing and the effect of anti-aliasing filters.

This video is part of the TI Precision Labs – ADCs curriculum. It describes Precision Labs Pro and the steps required to setup the hardware for the online lab e

This hands-on experiment shows how the front-end driver impacts SAR ADC performance.

This hands-on experiment shows how the front-end driver is impacted by resistor thermal noise.

The concepts and benefits of frequency planning for high speed ADC systems are covered, including sampling rate vs. Nyquist, harmonics and spurs.

This video covers phase and amplitude modulation, introduces the concepts of real and complex modulation and provides an example modulation use case.

This video highlights the considerations for low-power system design.  

This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.

The 105-MHz, OPA837 ultra-low-power amp is well-suited for use as a low-power 12 to 16-bit SAR ADC driver and for ultra-low-power active filter designs.

The 300-MHz gain bandwidth product, OPA838 voltage feedback amp is well-suited for use as a low-power 12 to 14-bit SAR ADC driver or transimpedance amp.

This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Overview of high-speed data converter architectures: pipeline, interleaved, Successive Approximation Register (SAR), DAC current source and current sink.

Considerations of Clock jitter, the impact on SNR, how to calculate it and minimize noise degradation for High-Speed Analog-to-Digital Converters.

Learn more about subsampling concepts pertaining to bandwidth vs. frequency, including: Nyquist frequency, aliasing, under-sampling, and input bandwidth.