ヒント:複数の語句はコンマで区切ってください

入力例:09/17/2021

入力例:09/17/2021

ヒント:複数の語句はコンマで区切ってください

入力例:09/17/2021

入力例:09/17/2021

並べ替え:

282 結果
Real and Complex Modulation

High Speed Data Converter Signal Processing: Real and Complex Modulation

日付:
2017年 9月 14日

所要時間::
15:45
This video covers phase and amplitude modulation, introduces the concepts of real and complex modulation and provides an example modulation use case.
SAR ADC Power Scaling

SAR ADC Power Scaling

日付:
2017年 9月 11日

所要時間::
18:54
This video highlights the considerations for low-power system design.  

Get Your Clocks in Sync for JESD204B Data Converters

日付:
2017年 9月 6日

所要時間::
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.

OPA837 Ultra-Low-Power High-Speed Amplifier Overview

日付:
2017年 8月 22日

所要時間::
04:48
The 105-MHz, OPA837 ultra-low-power amp is well-suited for use as a low-power 12 to 16-bit SAR ADC driver and for ultra-low-power active filter designs.

OPA838 Decompensated High-Speed Amplifier Overview

日付:
2017年 8月 22日

所要時間::
04:13
The 300-MHz gain bandwidth product, OPA838 voltage feedback amp is well-suited for use as a low-power 12 to 14-bit SAR ADC driver or transimpedance amp.

Get Your Clocks in Sync: Hardware Setup

日付:
2017年 8月 14日

所要時間::
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

Get Your Clocks in Sync: Software Setup

日付:
2017年 8月 7日

所要時間::
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Comparing high-speed analog-to-digital (ADC) and digital-to-analog (DAC) converter architectures

日付:
2017年 8月 2日

所要時間::
18:40
Overview of high-speed data converter architectures: pipeline, interleaved, Successive Approximation Register (SAR), DAC current source and current sink.
Jitter vs SNR for High Speed ADCs

Jitter's impact on signal-to-noise ratio (SNR) for high-speed analog-to-digital converters (ADCs)

日付:
2017年 7月 31日

所要時間::
08:00
Considerations of Clock jitter, the impact on SNR, how to calculate it and minimize noise degradation for High-Speed Analog-to-Digital Converters.
Bandwidth vs Frequency(Subsampling Concepts)

Bandwidth vs. Frequency - Subsampling Concepts

日付:
2017年 7月 31日

所要時間::
09:17
Learn more about subsampling concepts pertaining to bandwidth vs. frequency, including: Nyquist frequency, aliasing, under-sampling, and input bandwidth.
Understanding Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Sampling vs. data rate, decimation (DDC) and interpolation (DUC) in high-speed data converters

日付:
2017年 7月 31日

所要時間::
18:41
Explore the differences between sample rate and data rate and use decimation or interpolation to decrease or increase the data rate.
Understanding Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Understanding signal to noise ratio and noise spectral density in high speed data converters

日付:
2017年 7月 28日

所要時間::
14:32
Concepts of Signal to Noise Ratio and Noise Spectral Density; an example on how NSD is used to estimate the DAC output as it pertains to noise floor.

LMH3401 7GHz Fully Differential High-Speed Amplifier Overview

日付:
2017年 6月 27日

所要時間::
04:25
LMH3401 7-GHz, fully differential ultra-wide band amplifier provides a fixed gain of 16 dB and is well suited for use in DC to radio frequency applications.

Precision Signal Injector Demo

日付:
2017年 6月 23日

所要時間::
01:01
High Precision Digital to Analog Converter Training with Signal High-Fidelity Source Evaluation Module showcases our most precise data converter, the ADS8900B.
4-20mA input

Designing a Multi-Channel 4-20mA Analog Input Module

日付:
2017年 6月 21日

所要時間::
37:30
This training discusses real-world system requirements for a multi-channel 4-20mA analog input module for programmable logic controller (PLC).

How to measure ECG: A guide to the signals, system blocks and solutions

This training series explains the clinical basics of ECG, the physiology behind the signal and how to model the body with ideal electrical components.

Delta-Sigma ADCs Overview

日付:
2017年 5月 8日

所要時間::
04:35
This video will provide an overview of delta-sigma ADC topology.

Designing with Delta-Sigma ADCs: System design considerations to optimize performance

In this training series, you will how delta-sigma ADCs sample, how signals alias and understand which design parameters are most important.

Getting Best Performance From Your GSPS and RF Sampling ADC Designs

日付:
2017年 5月 8日

所要時間::
28:42
This video will talk about matching networks and clocking requirements for GSPS and RF Sampling ADC Inputs.

Delta-Sigma ADCs - Clocking

日付:
2017年 5月 4日

所要時間::
06:58
This video will focus on the ADC’s clock input.
282 結果
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