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X1QFN: The industry's smallest QFN package
日付:
所要時間：:
2016年 9月 12日
所要時間：:
04:31
Expanding the Standard Logic Products ecosystem, TI is introducing the first X1QFN package.
The Logic Minute – Logic and translation
The Logic Minute video series makes complex ideas related to logic and translation easy to understand in just a couple of minutes.
Synchronize Inverted Clock Inputs
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所要時間：:
2018年 6月 29日
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01:04
How to synchronize devices with inverted clock inputs operating off the same clock source.
Solving Voltage Translation Solutions With One Power Rail
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所要時間：:
2015年 4月 13日
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04:24
This video discusses applications needing voltage translation solutions with one power rail, providing examples of how to solve challenges within the design.
Schmitt-trigger CMOS inputs
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所要時間：:
2021年 10月 13日
所要時間：:
04:49
Learn about the benefits and operation of the Schmitt-trigger CMOS input architecture.
Overviews of devices and EVMs
A collection of videos reviewing specific logic and voltage translation parts or EVMs, including their key features and specifications.
Other logic
Learn more about logic and voltage translation.
Logic electrostatic discharge (ESD) protection
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所要時間：:
2021年 10月 13日
所要時間：:
02:53
Learn the basics of electrostatic discharge (ESD) protection for logic devices.
Logic and voltage translation
A list of all videos on training.ti.com related to logic and voltage translators that are not produced under the The Logic Minute.
Level-shift Using Open-Drain Outputs
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所要時間：:
2018年 9月 26日
所要時間：:
01:40
How to use open-drain logic devices to translate digital signals between different voltage nodes.
Industry's Smallest QFN Package
日付:
所要時間：:
2016年 9月 22日
所要時間：:
04:31
Expanding the Standard Logic Products ecosystem, TI is introducing the first X1QFN package. This is the smallest QFN package available in the industry today.
Hold a Signal During Controller Reset
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所要時間：:
2018年 3月 28日
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01:56
How to use logic to hold a signal line high or low while the system controller is powered off or held in reset.
Generate a Reset Signal at System Power On
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所要時間：:
2018年 6月 29日
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01:13
How to generate a power on reset signal.
Enable or Disable a Digital Signal
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2017年 11月 16日
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02:19
How to use logic to enable or disable a signal.
Eliminate Slow or Noisy Input Signals
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所要時間：:
2018年 3月 28日
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02:02
How to eliminate slow or noisy input signals.
Dual active bridge DC:DC power stage for a level 3 (fast) EV charging station (pile)
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所要時間：:
2019年 6月 27日
所要時間：:
01:04:25
Bi-directional, dual active bridge reference design for level 3 electric vehicle charging stations.
Common applications of buffers and inverters
Learn how to overcome common challenges by utilizing logic devices to aid in optimizing system design.
CMOS logic standard inputs
日付:
所要時間：:
2021年 10月 13日
所要時間：:
04:22
Learn about the operation of the input structure for standard CMOS devices.