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How to synchronize high speed multi-channel clocks?
This training explains how to synchronize high speed multi-channel clocks used in high-speed end equipment with multi-channel transceiver system.
How to enable the loopback mode feature with the AFE74xx EVM
日付:
所要時間：:
2019年 3月 4日
所要時間：:
03:59
Learn how to enable the loopback mode feature with the AFE74xx EVM.
How to configure the RX NCOs using the AFE74xx EVM
日付:
所要時間：:
2019年 3月 4日
所要時間：:
05:46
Learn how to configure the RX NCO settings, in single band mode, using the AFE74xx EVM.
How to configure the AFE74xx in Mode 4 using an external clock
日付:
所要時間：:
2019年 3月 4日
所要時間：:
05:04
Learn how to program the AFE74xx EVM using an external clock.
How to configure the AFE74xx EVM in transceiver mode
日付:
所要時間：:
2019年 3月 4日
所要時間：:
02:03
Learn how to operate the AFE74xx EVM in transceiver mode.
How to configure the AFE74xx DAC in Mode 4 using the internal PLL
日付:
所要時間：:
2019年 3月 1日
所要時間：:
04:55
Learn how to configure the DAC in mode 4 with the AFE74xx EVM
How to configure the AFE74xx ADC in Mode 4 using the internal PLL
日付:
所要時間：:
2019年 3月 1日
所要時間：:
02:33
Learn how to capture with the ADC in mode 4 with the AFE74xx EVM.
High-speed signal chain training series
Your portal to relevant training material on high-speed data converters and high-speed amplifiers.
Hardware setup for internal PLL operation with the AFE74xx EVM
日付:
所要時間：:
2019年 3月 1日
所要時間：:
02:42
Learn how to set up the hardware for internal PLL clock operation.
Hardware setup for external clock operation with the AFE74xx EVM
日付:
所要時間：:
2019年 3月 4日
所要時間：:
03:09
Learn how to set up the hardware to configure the AFE74xx EVM, in mode 4, using an external clock.
Getting started with the AFE77xx EVM
日付:
所要時間：:
2020年 1月 24日
所要時間：:
01:25
Get started with the AFE77xx EVM faster with this easy-to-use tutorial.
Getting started with the AFE7700
This series of videos provides tutorials to help you start designing faster.
Getting started with the AFE74xx RF-sampling transceiver
Quickly evaluate the AFE7444 and/or AFE7422 RF-sampling transceiver with this series of how to videos.
Get Your Clocks in Sync: Software Setup
日付:
所要時間：:
2017年 8月 7日
所要時間：:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers
Get Your Clocks in Sync: Hardware Setup
日付:
所要時間：:
2017年 8月 14日
所要時間：:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs
Get Your Clocks in Sync for JESD204B Data Converters
日付:
所要時間：:
2017年 9月 6日
所要時間：:
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.
General high-speed trainings
This series covers general updates on our high-speed signal chain portfolio.
FDA stability and simulating phase margin
日付:
所要時間：:
2017年 7月 10日
所要時間：:
17:38
This video discusses FDA stability and open-loop gain. You will also learn how to calculate and simulate with TINA-TI for FDAs.
Engineer It: How to ehance accuracy in radar applications
日付:
所要時間：:
2016年 4月 13日
所要時間：:
13:54
Simon explains how to enhance accuracy in radar applications using TI's RF Synthesizers
Engineer It: How to design with excellent PLL & VCO noise performance
日付:
所要時間：:
2016年 4月 12日
所要時間：:
18:18
Simon shows how to optimize your system design with easy design tips to gain excellent PLL & VCO noise performance