This training series looks at High Availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP), which are fundamental to many of the tightly-synchronized, high-reliability systems being built today. HSR and PRP work together or separate to keep systems working even when things break so that power stays on and things keep getting built. Both of them work in the low levels of the Ethernet stack to provide the applications that they serve these fundamental capabilities.
Advanced closed-loop control systems for factory, process, and power automation markets require powerful MCU solutions that can interface to variety of industrial communications protocols. As new features and capabilities are added, these protocols may evolve several times during the lifetime of an industrial product. As a result, system providers can benefit from solutions that flexibly support multiple communications protocols and in-service updates without updating hardware.
This training presents TI’s ready-to-use EtherCAT masters solutions for Sitara processors. EtherCAT master on Sitara runs on different operating systems, including TI-RTOS and RT Linux. It also runs on the EMAC interfaces (CPSW and PRU ICSS_EMAC) of any Sitara device, including AM57x, AM437x, and AM335x.
This training series provides background on embedded systems startup to enable users of the AM3x/AM4x/AM57x Sitara processors to make choices that reduce boot time during system design of a selected processor. It introduces the boot time components of the catalog processors, system, and the Processor Linux Software Development Kit (PLSDK). It provides first steps and capabilities to reduce boot time using the Processor SDK without significant customization. This presentation also gives developers a look beyond just the initialization of the selected OS.
This training series focuses on hardware design for the Multi-channel Audio Serial Port (McASP). Before an engineer gets around to writing software for McASP, it has to be wired up properly. That is the focus of this McASP primer.
TI provides key runtime software components and documentation to further ease development. TI’s online training provides an introduction to the Processor SDK and how to use this software to start building applications on TI processors.
The Programmable Real-Time Unit (PRU) is a small processor that is tightly integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices including the AM335x, AM437x, and AM57x Sitara Processors. The PRU is customer-programmable and can be used to implement simple and flexible control functions, peripherals, and state machines that directly access IO pins of the device, as well as can communicate with the application cores. TI's online training for PRU provides an introduction to development and debugging.
The AM4x Sitara processors provide scalable ARM Cortex‐A9 solutions for automation, HMI, vision, imaging, and other industrial and high‐performance applications. This online training series includes an introduction to the AM4x processor family and the industrial .application support provided for devices in this class.
Debugging Embedded Linux Systems training series teaches the techniques of debugging kernel issues that may be encountered in embedded Linux systems. It explains the Linux kernel logging system and logging API, illustrates how to locate a particular device driver, and demonstrates how to read kernel oops logs.
This section contains task-specific videos that demonstrate how to perform debugging techniques on embedded Linux systems.
The AM57x Sitara processors provide scalable ARM Cortex‐A15 and C66x solutions for automation, HMI, vision, imaging, and other industrial and high‐performance applications. This online training series includes an introduction to the AM57x processor family, a technical deep dive into the capabilities of the SoC, and an overview of the multimedia and video capabilities.