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66AK2Gx Processor Training Series

Similar to existing KeyStone-based SoC devices, the 66AK2Gx enables both the DSP and ARM cores to master all memory and peripherals in the system. This architecture facilitates maximum software flexibility where either DSP- or ARM-centric system designs can be achieved. 

This curriculum provides an in-depth look at the K2G Processors, Processor SDK-Linux and TI-RTOS, and the Programmable Realtime Unit (PRU).

Additional information

To learn more about the EVMK2G evaluation module and to purchase one for yourself, go to http://www.ti.com/tool/evmk2g

To learn more about the AUDK2G audio daughter card and to purchase one for yourself, go to http://www.ti.com/tool/audk2g

For more information regarding run-time software for the 66AK2Gx, refer to the Processor SDK Training Series.

1. 66AK2Gx Processors

The 66AK2Gx DSP + ARM processors are designed for automotive and consumer audio, industrial motor control, smart-grid protection and other high-reliability, real-time, compute-intensive applications. This training provides an overview of the device architecture and the processor cores. It also includes training related to voice and audio processing, as well as additional how-to video topics relevant to the EVMK2G evaluation module.

# Title Duration
1.1 Introduction to K2G Processors
This training provides an overview of  the K2G device architecture
1.2 KeyStone C66x DSP CorePac Overview
This module discusses how high performance can be achieved within each C66x DSP core. Topics include C66x DSP CorePac architecture, Single Instruction...
1.3 KeyStone II DSP+ARM SoC Architecture Overview
This module provides a high-level view of the device architecture, including the C66x DSP and ARM Cortex-A15 processors, memory and transport topologies,...
1.4 KeyStone Instruction Set Architecture (ISA)
This module describes the differences between the TMS320C674x instruction set architecture and the TMS320C66x instruction set included in the KeyStone...
1.5 Demonstrating Voice Preprocessing on the EVMK2G
This video demonstrates the voice pre-processing TI design for the EVMK2G platform.
06:05
1.6 Getting Started With the Audio Benchmark Starterkit
The Audio Benchmark Starterkit is intended to provide an easy and quick way to benchmark key audio functions on C66x and C674x DSP devices.
10:25
1.7 Restoring Factory Default Images on KeyStone II Platforms
This video demonstrates how to restore the factory default images on KeyStone II evaluation platforms with no SD card including K2E, K2H, K2K, and K2L...
06:30
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2. Processor SDK for KeyStone Processors

TI provides key runtime software components and documentation to further ease development. TI’s online training provides an introduction to the Processor SDK and how to use this software to start building applications on TI processors.

# Title Duration
2.1 Introduction to the Processor SDK Training Series
This short video provides an introduction of the Processor SDK training series including how to access and a curriculum overview.
02:32
2.2 Processor SDK Overview
This module provides an introduction to the Processor Software Development Kit (SDK), the next generation unified software platform for TI’s newest processor...
2.3 Processor SDK Linux Overview
This module takes a look at the purpose of the Processor SDK for Linux, how it is designed to provide flexibility and re-usability, and how the kit creates...
2.4 Processor SDK Linux Components
This module provides an introduction to the functional components included in the Processor SDK for Linux and describes how these components can be used...
2.5 Processor SDK Linux Matrix Application Launcher Overview
This module explains the purpose of the Matrix, an example application that launches by default within the Processor SDK for Linux. The capabilities of...
2.6 Introduction to Processor SDK RTOS Part 1
This module is the first installment of a two-part overview of the Processor SDK from the TI-RTOS perspective. It introduces the functional elements that...
2.7 Introduction to Processor SDK RTOS Part 2
This module is the second installment of a two-part overview of the Processor SDK from the TI-RTOS perspective. It examines the functional elements that...
2.8 Application Development Using Processor SDK RTOS
This presentation provides a detailed overview of the application development process using the Processor SDK RTOS release. It walks through each step...
2.9 Introduction to Inter-Processor Communication (IPC) for KeyStone and Sitara™ Devices
The IPC software package is designed to hide the lower-layer hardware complexity of multi-core devices and help users to quickly develop applications
2.10 Setting Up and Testing Processor SDK RTOS Device Drivers
This video demonstrates how to setup and test device drivers included in the Processor SDK RTOS package.
05:44
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3. PRU for 66AK2Gx Processors

The Programmable Real-Time Unit (PRU) is a small processor that is tightly integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices including the 66AK2Gx, AM335x, AM437x, and AM57x Processors. The PRU is customer-programmable and can be used to implement simple and flexible control functions, peripherals, and state machines that directly access IO pins of the device, as well as can communicate with the application cores.

# Title Duration
3.1 Introduction to the Programmable Real-Time Unit (PRU) Training Series
This short video provides an introduction of the PRU training series including how to access the series page and a curriculum overview.
02:27
3.2 Sitara™ Processors Building Blocks for PRU Development Summary
This session provides an overview of the Programmable Real-Time Unit (PRU) subsystem, device and IO integration, and programming model.
3.3 Sitara™ Processors Building Blocks for PRU Development: Hardware
The Programmable Real-Time Unit is a small processor that is integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devi...
3.4 Sitara™ Processors Building Blocks for PRU Development: Firmware
The Programmable Real-Time Unit is a small processor that is integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devi...
3.5 Sitara™ Processors: Debug PRU Using Code Composer Studio (CCS)
This presentation provides a step-by-step process on how to get started debugging the Programmable Real-Time Unit (PRU) using Code Composer Studio (CCS)....
3.6 Sitara™ Processors: Programmable Real-Time Unit (PRU) Compiler Tips & Tricks
This presentation provides tips and tricks for using the Programmable Real-Time Unit (PRU) C/C++ Compiler, including recommendations.
3.7 Rebuilding PRU Firmwares on Target Using Sitara Processors
This video demonstrates how to install and use the PRU C compiler on Sitara Processor evaluation modules for AM57x, AM437x, and AM335x.
08:24
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