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KeyStone ARM & DSP Multicore Device Training Series

This training series provides an in-depth look at KeyStone multicore SoC devices.

1. KeyStone Architecture

# Title Duration
1.1 KeyStone I C667x DSP SoC Architecture Overview
This module provides a high-level view of the KeyStone I C667x device architecture, the processing and memory topologies, acceleration and interface improvements,...
1.2 KeyStone I C665x DSP SoC Architecture Overview
This module provides a high-level view of the KeyStone I C665x device architecture, the processing and memory topologies, acceleration and interface improvements,...
1.3 KeyStone II DSP+ARM SoC Architecture Overview
This module provides a high-level view of the device architecture, including the C66x DSP and ARM Cortex-A15 processors, memory and transport topologies,...
1.4 KeyStone C66x DSP CorePac Overview
This module discusses how high performance can be achieved within each C66x DSP core. Topics include C66x DSP CorePac architecture, Single Instruction...
1.5 KeyStone Instruction Set Architecture (ISA)
This module describes the differences between the TMS320C674x instruction set architecture and the TMS320C66x instruction set included in the KeyStone...
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2. Memory and Transport

# Title Duration
2.1 KeyStone Memory and Cache
This module provides a detailed look at the KeyStone memory subsystem including the Multicore Shared Memory Controller (MSMC), local and shared memory/cache...
2.2 KeyStone Multicore Navigator
This module provides an introduction to the architecture and functional components of the Multicore Navigator, which includes the Queue Manager Subsystem...
2.3 KeyStone Multicore Navigator: Queue Manager Subsystem (QMSS)
This module provides a detailed look at the functional elements of the QMSS and provides information on programming QMSS through the use of registers and...
2.4 KeyStone Multicore Navigator: Packet DMA
This module provides a detailed look at the infrastructure and functional aspects of the PKTDMA and provides information on programming PKTDMA through...
2.5 KeyStone Inter-Processor Communication (IPC)
This module provides an overview of the hardware and software that transports data and/or signals between threads of execution in KeyStone I C66x DSP multicore...
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3. External Interfaces

# Title Duration
3.1 KeyStone External Interfaces (EMIF-A, UART, I2C, SPI, TSIP)
This module provides an overview of selected external interfaces on KeyStone devices including UART, I2C, SPI, TSIP, and EMIF-A.
3.2 KeyStone Serial Rapid IO (SRIO)
This module takes a look at the new features and enhancements of the SRIO on KeyStone devices.
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4. Wireless Accelerators and Co-Processors

# Title Duration
4.1 KeyStone FFT Co-Processor (FFTC)
This module presents the architecture and features of the FFT co-processor.
4.2 KeyStone Turbo Decoder Co-Processor (TCP3D)
This module provides an overview of TCP3D including key features, modes, drivers, and configuration. Examples are provided.
4.3 KeyStone Turbo Encoder Co-Processor (TCP3E)
This module provides an overview of TCP3E including usage, initialization, and configuration. Examples are provided.
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5. Software and Tools

# Title Duration
5.1 Multicore Software Development Kit (MCSDK) for KeyStone Devices
This module provides an overview of the multicore SoC software for KeyStone I C66x DSP devices. This module introduces the optimized software components...
5.2 KeyStone Bootloader Overview
This module provides an introduction to the C66x bootloader including configuration, device startup, and run-time modes.
5.3 KeyStone Power Management
This module provides an overview of the C66x power domain topology, power-saving features, power and clocking domains, power states, and Smart Reflex.
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