5.2 KeyStone I training: bootloader overview
Description
November 9, 2010
This training provides an overview of the bootloader used by the KeyStone I architecture devices.
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1KeyStone Architecture (5)
An introduction to the functional architecture of the C66x DSP + ARM embedded processors, the DSP and ARM cores, and the Instruction Set Architecture (ISA)
2KeyStone Memory and Transport (5)
This section provides information about the memory and transport architectures of the C66x DSP + ARM embedded processors.
3KeyStone External Interfaces (5)
This section provides training on the external interfaces of the C66x DSP + ARM embedded processors.
4KeyStone Wireless Accelerators and Co-Processors (4)
This section provides an overview of the wireless accelerators and co-processors on C66x DSP + ARM embedded processors.
5KeyStone Software and Tools (4)
This section introduces various software and tools on C66x DSP + ARM embedded processors.
6KeyStone Demonstrations (4)
This section includes demonstrations for software and hardware processes performed on KeyStone devices.
7Processor SDK for TI Embedded Processors (12)
This section provides an overview of the Processor SDK for Linux and RTOS for use on TI embedded processors.
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