3.5 PRU-ICSS: Interfacing a processor with multiple ADCs
2018년 4월 27일
Select TI processors feature a unique subsystem, called the Programmable-Real-Time Unit Industrial Communications Subsystem (PRU-ICSS). This enables the integration of real-time industrial communications protocols and eliminates the need for an external ASIC or FPGA. This video demonstrates how the PRU-ICSS subsystem can provide flexible interface between the processor and multiple Analog-to-Digital Converters (ADCs) to enhance data acquisition performance.
This course is also a part of the following series
Date: 9월 16일, 2016년