힌트: 여러 단어는 쉼표로 구분

예: 06/25/2022

예: 06/25/2022

힌트: 여러 단어는 쉼표로 구분

예: 06/25/2022

예: 06/25/2022

정렬 기준:

390 결과

Delta-Sigma ADCs - Voltage Reference

날짜:
2017년 5월 4일

기간::
11:24
This video will focus on the ADC’s voltage reference.

Delta-Sigma ADCs - Clocking

날짜:
2017년 5월 4일

기간::
06:58
This video will focus on the ADC’s clock input.

Introduction to "Designing with Delta-Sigma ADCs" Training Series

날짜:
2017년 5월 4일

기간::
01:28
Welcome to this training series on “Designing with delta-sigma ADCs: system design considerations to optimize performance.”

Getting Best Performance From Your GSPS and RF Sampling ADC Designs

날짜:
2017년 5월 8일

기간::
28:42
This video will talk about matching networks and clocking requirements for GSPS and RF Sampling ADC Inputs.

Designing with Delta-Sigma ADCs: System design considerations to optimize performance

In this training series, you will how delta-sigma ADCs sample, how signals alias and understand which design parameters are most important.

Delta-Sigma ADCs Overview

날짜:
2017년 5월 8일

기간::
04:35
This video will provide an overview of delta-sigma ADC topology.

How to measure ECG: A guide to the signals, system blocks and solutions

This training series explains the clinical basics of ECG, the physiology behind the signal and how to model the body with ideal electrical components.
More-Channels-in-Less-Space-New-Trends-In-Highly-Integrated-DACs.png

Webinar - More Channels in Less Space: New Trends in Highly Integrated DACs

날짜:
2017년 6월 20일

기간::
32:42
How a Highly Integrated Quad Channel Analog output module with Adaptive power management Solves the space demand problem in factory automation
4-20mA input

Designing a Multi-Channel 4-20mA Analog Input Module

날짜:
2017년 6월 21일

기간::
37:30
This training discusses real-world system requirements for a multi-channel 4-20mA analog input module for programmable logic controller (PLC).

Precision Signal Injector Demo

날짜:
2017년 6월 23일

기간::
01:01
High Precision Digital to Analog Converter Training with Signal High-Fidelity Source Evaluation Module showcases our most precise data converter, the ADS8900B.

LMH3401 7GHz Fully Differential High-Speed Amplifier Overview

날짜:
2017년 6월 27일

기간::
04:25
LMH3401 7-GHz, fully differential ultra-wide band amplifier provides a fixed gain of 16 dB and is well suited for use in DC to radio frequency applications.
Understanding Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Understanding signal to noise ratio and noise spectral density in high speed data converters

날짜:
2017년 7월 28일

기간::
14:32
Concepts of Signal to Noise Ratio and Noise Spectral Density; an example on how NSD is used to estimate the DAC output as it pertains to noise floor.
Understanding Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Sampling vs. data rate, decimation (DDC) and interpolation (DUC) in high-speed data converters

날짜:
2017년 7월 31일

기간::
18:41
Explore the differences between sample rate and data rate and use decimation or interpolation to decrease or increase the data rate.
Bandwidth vs Frequency(Subsampling Concepts)

Bandwidth vs. Frequency - Subsampling Concepts

날짜:
2017년 7월 31일

기간::
09:17
Learn more about subsampling concepts pertaining to bandwidth vs. frequency, including: Nyquist frequency, aliasing, under-sampling, and input bandwidth.
Jitter vs SNR for High Speed ADCs

Jitter's impact on signal-to-noise ratio (SNR) for high-speed analog-to-digital converters (ADCs)

날짜:
2017년 7월 31일

기간::
08:00
Considerations of Clock jitter, the impact on SNR, how to calculate it and minimize noise degradation for High-Speed Analog-to-Digital Converters.

Comparing high-speed analog-to-digital (ADC) and digital-to-analog (DAC) converter architectures

날짜:
2017년 8월 2일

기간::
18:40
Overview of high-speed data converter architectures: pipeline, interleaved, Successive Approximation Register (SAR), DAC current source and current sink.

Get Your Clocks in Sync: Software Setup

날짜:
2017년 8월 7일

기간::
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Get Your Clocks in Sync: Hardware Setup

날짜:
2017년 8월 14일

기간::
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

OPA838 Decompensated High-Speed Amplifier Overview

날짜:
2017년 8월 22일

기간::
04:13
The 300-MHz gain bandwidth product, OPA838 voltage feedback amp is well-suited for use as a low-power 12 to 14-bit SAR ADC driver or transimpedance amp.

OPA837 Ultra-Low-Power High-Speed Amplifier Overview

날짜:
2017년 8월 22일

기간::
04:48
The 105-MHz, OPA837 ultra-low-power amp is well-suited for use as a low-power 12 to 16-bit SAR ADC driver and for ultra-low-power active filter designs.
390 결과
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