1.1 Mastering the Art and Fundamentals of High Voltage Gate Driver Design

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Date: October 9, 2017

This in-depth discussion will cover how to drive these state-of-the-art power transistors and key design considerations that our customers face. Topics will include: parasitic influences, hard switching vs soft switching, non-linear junction capacitance (CRSS, COSS), common-mode transient immunity (CMTI), turn-off negative bias, separating power/ground noise, and trade-offs between different isolated DC-DC topologies for powering gate drivers.