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206 Results
Understanding Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Understanding Signal to Noise Ratio (SNR) and Noise Spectral Density (NSD) in High Speed Data Converters

Date:
July 28, 2017

Duration:
14:32
Concepts of Signal to Noise Ratio and Noise Spectral Density; an example on how NSD is used to estimate the DAC output as it pertains to noise floor.

Understanding and Comparisons of High-Speed Analog-to-Digital (ADC) and Digital-to-Analog (DAC) Converter Architectures

Date:
August 2, 2017

Duration:
18:40
Overview of high-speed data converter architectures: pipeline, interleaved, Successive Approximation Register (SAR), DAC current source and current sink.
Bandwidth vs Frequency(Subsampling Concepts)

Bandwidth vs. Frequency - Subsampling Concepts

Date:
July 31, 2017

Duration:
09:17
Learn more about subsampling concepts pertaining to bandwidth vs. frequency, including: Nyquist frequency, aliasing, under-sampling, and input bandwidth.
Understanding Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Date:
July 31, 2017

Duration:
18:41
Explore the differences between sample rate and data rate and use decimation or interpolation to decrease or increase the data rate.
Jitter vs SNR for High Speed ADCs

The Impact of Jitter on Signal to Noise Ratio (SNR) for High-Speed Analog-to-Digital Converters (ADCs)

Date:
July 31, 2017

Duration:
08:00
Considerations of Clock jitter, the impact on SNR, how to calculate it and minimize noise degradation for High-Speed Analog-to-Digital Converters.

Get Your Clocks in Sync: Hardware Setup

Date:
August 14, 2017

Duration:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

Get Your Clocks in Sync: Software Setup

Date:
August 7, 2017

Duration:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Get Your Clocks in Sync for JESD204B Data Converters

Date:
September 6, 2017

Duration:
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.
TIPL4705 - High Speed Digital-to-Analog Converter (DAC) Output Response

High Speed Digital-to-Analog Converter (DAC) Output Response in NRZ, RZ and RTC (Mixed Mode) Output Modes

Date:
September 15, 2017

Duration:
13:36
The video discusses signal reconstruction, non-ideal & desired response and multi-Nyquist Operation.

TPS92830-Q1 Automotive LED controller demo

Date:
November 28, 2017

Duration:
03:17
The TPS92830-Q1 automotive LED controller allows you to achieve higher power in your automotive lighting design. View the device's capabilities in this video.

Precision temperature measurement in heat and cold meters

PT100/500/1000 Resistance Temperature Detectors (RTDs) are widely used in grid infrastructure and factory automation applications where high precision temperature measurement is often required. Technical requirements include either 20 mK precise Differential Temperature Measurement (DTM) for heat and cold meters from 0 to 180°C or better than 400 mK precision over the full range of -200 to 850°C for industrial sensor transmitters.

Overview of Analog Outputs

Designing SMART Field Transmitters and PLCs with HART: Overview of Analog Output Modules

Date:
April 30, 2018

Duration:
12:18
This presentation gives an overview of 2-wire and 3-wire analog output modules for PLCs and field transmitters.

Designing SMART Field Transmitters and PLCs with HART: 2-Wire Transmitter Design and HART Testing

Date:
April 30, 2018

Duration:
26:19
This presentation provides a 2-wire HART enabled transmitter design example with HART testing considerations.

The HART of the Current Loop: Designing SMART Field Transmitters and PLCs with TI's Very First HART Modem

This presentation series covers analog output design and how HART is used in both analog input modules and analog output modules. It also provides information on the HART testing and certification process.

Signal Acquisition system using TI’s High Resolution SAR Converters

The report illustrates a differentially driven signal fed into TI’s 20 bit SAR ADC. This results in raw data available for data processing. This has zero latency and high linearity.

This TI design illustrate the CW Doppler signal conditioning for an ultrasound machine. The input signal bandwidth up to 100KHz and 128 differential signals from AFEs are summed together in a differential high speed amplifier and digitized with TI SAR ADC.

This presentation also addresses :

An adaptive circuit for adjusting the cut off frequency of anti-aliasing circuit in our explanations.

Wireless Multi-parameter Patient Monitor Demo

Date:
June 1, 2018

Duration:
04:02
A simple, wearable, wireless, multi-parameter, patient monitor operated using coin-cell battery and supporting raw data over Bluetooth® 5

Precision DACs (<=10MSPS) – Learning center

The Precision DAC Learning Center is a collection of technical content that will help guide you through the precision DAC design process. Whether you are learning the basics of digital-to-analog conversion or trying to understand how to implement a precision DAC in your system, this learning center provides a range of videos, articles, and blogs to help you along the way.

How to synchronize high speed multi-channel clocks?

Modern high speed end equipment's like oscilloscope, 5G wireless communication tester and RADAR requires multichannel transceiver system. The biggest challenge is to provide the high frequency, low phase noise, multiple synchronized clocks to each transceiver's data converters and local oscillator. This training will explain how to synchronize the high speed multichannel clocks and expand for high channel count clocks requirement.
Precision DAC

Demystifying circuit design with Precision DAC Part 1

Date:
December 7, 2018

Duration:
14:53
Part 1: Speaker starts from a Precision DAC portfolio table to introduce the features as well as the popular application in the industrial market.
Precision DAC

Demystifying circuit design with Precision DAC Part 2

Date:
December 7, 2018

Duration:
15:38
Part 2: In this speaker addresses the resistor ladder (3-bit), the theory and the way it works. Also introduce the R-2R DAC’s advantage, disadvantage and the ap
206 Results
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