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383 Results

Introducing the EVMK2H Evaluation Module for 66AK2Hx Processors

Date:
February 16, 2016

Duration:
05:55
Introducing the EVMK2H evaluation module, the cost-efficient development tool from Texas Instruments that enables developers of high-performance compute systems
Introducing the TMS320C6678 Lite EVM

Introducing the TMS320C6678 Lite Evaluation Module for C66x Processors

Date:
February 16, 2016

Duration:
03:17
Introducing the TMS320C6678 Lite Evaluation Module, the cost-efficient development tool from Texas Instruments that enables developers to quickly get started wo
Getting Started with the EVMK2EX

Getting Started with the EVMK2EX Development Board for 66AK2Ex and AM5K2Ex Processors

Date:
February 16, 2016

Duration:
04:21
The XEVMK2EX is a full-featured development tool for 66AK2Ex and AM5K2Ex KeyStone II-based SOCs. Get started developing general purpose embedded processor compu

TI-RTOS Kernel Workshop

Date:
February 17, 2016
For more details on attending the live version of this workshop including student guide, labs/solution files, installation guide, etc., please click: HereFormer

Leveraging DSP: Basic Optimization for C6000 Digital Signal Processors

Date:
March 14, 2016
This module discusses how to leverage DSP capabilities by optimizing code on C6000 digital signal processors. It provides an introduction to both the hardware a

Sitara™ Processors Building Blocks for PRU Development: Firmware

Date:
March 30, 2016
The Programmable Real-Time Unit is a small processor that is integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices

Sitara™ Processors Building Blocks for PRU Development: Hardware

Date:
March 30, 2016
The Programmable Real-Time Unit is a small processor that is integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices

Sitara™ Processors: Programmable Real-Time Unit (PRU) Compiler Tips & Tricks

Date:
March 30, 2016
This presentation provides tips and tricks for using the Programmable Real-Time Unit (PRU) C/C++ Compiler, including recommendations.

EE Live! Training: Fast DSP Development on the C5517 EVM

Date:
April 7, 2016

Duration:
17:17
Explore C5517 development platform capabilities through interactive setup and development. “10-minutes to ‘Hello World!’”

C55x Digital Signal Processors Training Series

TI’s TMS320C55x Fixed-Point Digital Signal Processors (DSP) enable high performance and low power through increased parallelism and total focus on power savings. Industry-leading active power enables computationally-intensive applications, such as voice triggering and encoding, to run on battery for extended period of time. Development tools include the award-winning eXpressDSP, Code Composer Studio (CCS), Integrated Development Environment (IDE), DSP/BIOS, optimized DSP and math libraries, and the industry’s largest third-party network.

Getting Started with the C5535 eZdsp Development Kit

Date:
April 7, 2016

Duration:
04:23
This video provides an overview of the out-of-box-experience (OOBE) for the C5535 eZdsp

Introduction to C55x Digital Signal Processors

Date:
April 8, 2016
This module provides an introduction to the C55x family of DSPs from Texas Instruments.

Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS / PRU-ICSSG) Training Series

The Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS / PRU-ICSSG) is a small processor that is tightly integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices including the AM335x, AM437x, AM57x, and AM65x Sitara Processors. The PRU-ICSS / PRU-ICSSG is customer-programmable and can be used to implement simple and flexible control functions, peripherals, and state machines that directly access IO pins of the device, as well as can communicate with the application cores.

66AK2Gx Processor Training Series

Similar to existing KeyStone-based SoC devices, the 66AK2Gx enables both the DSP and ARM cores to master all memory and peripherals in the system. This architecture facilitates maximum software flexibility where either DSP- or ARM-centric system designs can be achieved. 

This curriculum provides an in-depth look at the K2G Processors, Processor SDK-Linux and TI-RTOS, and the Programmable Realtime Unit (PRU).

Introduction to K2G Processors

Date:
April 29, 2016
This training provides an overview of  the K2G device architecture

Introduction to Inter-Processor Communication (IPC) for KeyStone and Sitara™ Devices

Date:
May 4, 2016
The IPC software package is designed to hide the lower-layer hardware complexity of multi-core devices and help users to quickly develop applications

Debugging Common Application Issues with TI-RTOS

Date:
May 25, 2016

Duration:
25:26
This presentation shows how TI-RTOS helps a user debug the following common application issues: stack overflows, device exceptions, and memory mismanagement.

Sitara™ Processors Building Blocks for PRU Development: Designing a PRU Application

Date:
May 25, 2016
The Programmable Real-Time Unit (PRU) is a small processor that is integrated with an IO subsystem, offering low-latency control on TI’s SoC devices

KeyStone Power Management

Date:
June 1, 2016
This module provides an overview of the C66x power domain topology, power-saving features, power and clocking domains, power states, and Smart Reflex.

KeyStone I C665x DSP SoC Architecture Overview

Date:
June 1, 2016
This module provides a high-level view of the KeyStone I C665x device architecture, the processing and memory topologies, acceleration and interface improvemen
383 Results
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