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2172 Results

NVDC Charging Design Considerations and Trade-offs

Date:
January 1, 2012

Duration:
14:17
This two-part presentation looks at traditional and hybrid charging configurations, then moves into narrow VDC (NVDC) charger designs. In Part 1, we examine the traditional and hybrid chargers, with an overview of the topology and an example for each. In Part 2, we go into more detail of the NVDC design, looking at Energy Star, system capacitance considerations, battery removal, and battery pre-charge.

Understanding Battery Charging IC Specifications - Part 1

Date:
September 1, 2015

Duration:
18:36
Two-part presentation discusses some of the key charger parameters and related background information.

MaxLife Technology: Extending Battery Service Life and Minimizing Charge Time

Date:
January 1, 2012

Duration:
32:53
This presentation gives a detailed look at the challenges associated with charging batteries quickly. We first look at the causes of battery degradation, including the chemistries in cells, and ways of accurately modeling degradation. Charging solutions are then provided using the Multi-level Charging (MLC) optimized battery modeling framework and the MLC ecosystem.

Development Trends in Battery Technology/Chemistry

Date:
January 1, 2012

Duration:
17:46
Two-part presentation on trends in baThis two-part presentations discusses current and future trends in battery technology, specifically how choices in materials affect voltages and battery capacity, e.g., modern electrolytes and the newest overlithiated layered oxides (OLO). We also take a brief look at future chemistries that offer the highest theoretical energy densities in batteries.ttery technology. How choices in materials affect voltages and battery capacity.

Power Management Unit Overview

Date:
February 9, 2015

Duration:
07:48
This short presentation gives a broad overview of what PMUs are, how they are defined, and what advantages they offer over discrete solutions.

KeyStone I training: fast fourier transform coprocessor (FFTC)

Date:
November 9, 2010

Duration:
25:22
Fast Fourier Transform Coprocessor (FFTC) presents the architecture and features of the FFT Coprocessor.

KeyStone I training: I/O interfaces

Date:
November 9, 2010

Duration:
22:05
I/O Interfaces provides an overview of selected external interfaces on the C66x devices including UART, I2C, SPI, TSIP and EMIF-A.

KeyStone I training: instruction set architecture (ISA)

Date:
March 9, 2015

Duration:
30:57
C66x Instruction Set Architecture describes the differences between the TMS320C674x instruction set architecture and the TMS320C66x instruction set included in the KeyStone CorePac.

KeyStone I training: introduction to interprocessor communication (IPC)

Date:
November 9, 2010

Duration:
40:28
Introduction to Interprocessor Communication (IPC) provides an overview of the hardware and software that transports data and/or signals between threads of execution in the KeyStone family of C66x multicore devices.

KeyStone I training: memory and cache

Date:
November 9, 2010

Duration:
01:01:07
CorePac & Memory Subsystem provides a detailed look at the C66x memory subsystem including the Multicore Shared Memory Controller (MSMC), local & shared memory/cache control, extended memory, and memory protection.

KeyStone I training: multicore navigator - packet DMA (PKTDMA)

Date:
November 9, 2010

Duration:
32:16
Multicore Navigator: Packet DMA (PKTDMA) provides a detailed look at the infrastructure and functional aspects of the PKTDMA and provides information on programming PKTDMA through the use of registers and low level drivers.

Foreign Object Detection (FOD)

Date:
January 27, 2014

Duration:
10:36
Support WPC 1.1 standard with Foreign Object Detection. Covers measurements of transmitted power and calibrating the FOD circuit.

KeyStone I training: multicore navigator - queue manager subsystem (QMSS)

Date:
November 9, 2010

Duration:
28:22
Multicore Navigator: Queue Manager Subsystem (QMSS) provides a detailed look at the functional elements of the QMSS and provides information on programming QMSS through the use of registers and low level drivers.

KeyStone I training: multicore navigator overview

Date:
November 9, 2010

Duration:
36:36
Multicore Navigator Overview provides an introduction to the architecture and functional components of the Multicore Navigator, which includes the Queue Manager Subsystem (QMSS) and Packet DMA (PKTDMA).

KeyStone I training: multicore software development kit (MCSDK) overview

Date:
November 9, 2010

Duration:
17:42
This session provides an introduction to and overview of the MCSDK.

KeyStone I training: NETCP - packet accelerator (PA)

Date:
November 9, 2010

Duration:
26:36
NETCP Packet Accelerator (PA) takes a look at the motivation behind the PA, the hardware, firmware and low level drivers, as well as a programming use case.

KeyStone I training: NETCP - security accelerator (SA)

Date:
November 9, 2010

Duration:
15:45
NETCP Security Accelerator (SA)takes a look at the motivation behind the SA, the firmware and low level drivers, as well as a usage case for IPSec encryption and decryption.

KeyStone I training: network coprocessor (NETCP) overview

Date:
November 9, 2010

Duration:
04:20
Network Coprocessor (NETCP) Overview provides an introduction to the NETCP, which includes the Packet Accelerator (PA), Security Accelerator (SA), and Ethernet Subsystems.

KeyStone I training: power management

Date:
November 9, 2010

Duration:
24:26
Power Management provides an overview of the C66x power domain topology, power-saving features, power and clocking domains, powers states, and Smart Reflex.

KeyStone I training: turbo decoder co-processor (TCP3D)

Date:
November 9, 2010

Duration:
45:16
Turbo Decoder Co-Processor (TCP3D) provides an overview of TCP3D including key features, modes, drivers, and configuration. Examples are provided.
2172 Results