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34 Results

Output Capacitor Selection Using a Target Impedance Approach

Date:
February 10, 2020

Duration:
08:24
Study two techniques for selecting output capacitance to meet transient specs

DC Load Lines: How They Can Benefit Your Next Design

Date:
February 10, 2020

Duration:
05:04
Get top of the line performance out of your regulator by adding a DC Load Line

Understanding Transient Response In the Time and Frequency Domain

Date:
February 10, 2020

Duration:
05:10
Dive into how a regulator's transient response looks in both time and frequency

Jacinto 7 Vehicle Compute Gateway

Date:
January 7, 2020

Duration:
02:47
DRA829V SoC supports vehicle compute systems

Jacinto 7 DRA82x automotive gateway SoCs with PCIe switch

Date:
January 2, 2020

Duration:
02:06
Accelerate the data highway in the software-defined car with DRA82x processors.

Jacinto 7 evaluation module for next-generation ADAS and Gateway applications

Date:
January 2, 2020

Duration:
03:23
Watch this video to discover how to evaluate TDA4x and DRA82x processors in next-generation ADAS and Gateway applications.
Creating ADAS applications with Processor SDK Automotive

Processor SDK Automotive for Jacinto 7: Creating ADAS applications

Date:
December 30, 2019

Duration:
14:18
How to create an ADAS application on the Jacinto™ 7 TDA4VMx evaluation module using Processor SDK Automotive
Creating Gateway applications with Processor SDK Automotive

Processor SDK Automotive for Jacinto 7: Creating gateway applications

Date:
December 30, 2019

Duration:
18:03
How to create a gateway application on the Jacinto™ 7 DRA829V evaluation module using Processor SDK Automotive
Jacinto 7 processors: network connectivity

Jacinto 7 processors: network connectivity

Date:
December 30, 2019

Duration:
05:18
An introduction to network connectivity features on Jacinto™ 7 processors and the benefits they provide for automotive applications.
Jacinto 7 processors: flash, storage, and serial connectivity

Jacinto 7 processors: flash, storage, and serial connectivity

Date:
December 30, 2019

Duration:
04:35
An introduction to storage and serial connectivity features on Jacinto™ 7 processors for automotive applications.

Processor SDK Automotive for Jacinto 7: software overview

Date:
December 30, 2019

Duration:
07:13
An introduction to the Processor SDK Automotive for Jacinto™ 7 processors

Processor SDK Automotive for Jacinto 7: getting started

Date:
December 30, 2019

Duration:
11:24
How to get started building and running demonstrations on the Processor SDK Automotive for Jacinto™ 7 processors
Jacinto 7 processors: heterogeneous processing cores

Jacinto 7 processors: heterogeneous processing cores

Date:
December 30, 2019

Duration:
08:08
An introduction to Jacinto™ 7 processing cores and the features and benefits they provide in supporting automotive applications.
Jacinto 7 processors: application-specific hardware accelerators

Jacinto 7 processors: application-specific hardware accelerators

Date:
December 30, 2019

Duration:
07:32
An introduction to Jacinto™ 7 hardware accelerators and the features and benefits they provide in supporting automotive applications.
Jacinto 7 device overview

Jacinto 7 processors: Overview of SoC subsystems and features for automotive applications

Date:
December 30, 2019

Duration:
17:08
An introduction to Jacinto™ 7 processors, including device architecture, key features and subsystems, and the benefits they provide for automotive applications.

Voltage Regulator Design and Optimization for High-Current, Fast-Slew-Rate Load Transients

Designing to the tight voltage tolerances of today’s modern central processing units and field programmable gate arrays (FPGAs) is becoming more difficult as their current draw increases and becomes more dynamic. Getting the correct output capacitance mix to ensure first-time power-delivery success is no small feat with >100-A steps and slew rates in excess of 100 A/µs. Standard point-of-load design techniques no longer hold true; we need new methods to choose the output capacitance.

The McASP Primer Training Series

This training series focuses on hardware design for the Multi-channel Audio Serial Port (McASP).  Before an engineer gets around to writing software for McASP, it has to be wired up properly. That is the focus of this McASP primer.

The McASP Primer: Bonus Material

Date:
January 25, 2019

Duration:
06:43
This training provides information on 48 kHz frame sync generation and audio FIFO configuration with the Multi-channel Audio Serial Port (McASP).

The McASP Primer: Practical Examples - Transmitter & SYNC

Date:
January 25, 2019

Duration:
12:51
This training provides practical examples of using the Multi-channel Audio Serial Port (McASP) in transmitter and SYNC mode.

The McASP Primer: Practical Examples - Receiver

Date:
January 25, 2019

Duration:
09:11
This training provides practical examples of using the Multi-channel Audio Serial Port (McASP) in receiver mode.
34 Results
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