This training video will firstly introduce the configuration of TI's capacitive isolation technology, and compare over other methods, like opto-coupler, transformative. Another important benefit - "fail open" of TI's capacitor isolation, will also be discussed.

This training video will firstly discuss the configuration of the UCC2x52x gate driver and it featured benefits, then a detailed bench experiment comparison shows that UCC2x52x family gate drivers has better dynamic performance as well as stable and predictable source/sink peak current. 

This training video will help to understand the UCC2152x's output configuration and grounding consideration when driving FETs and IGBTs with negative voltage bias. Three different implementation methods are introduced, pros and cons of each methods are illustrated.

Gate driver design deep dive outline:

-Parasitics in gate driver-Gate driver soft/hard switching difference-Strong gate driver and MOSFET nonlinear COSS-Common mode transient immunity(CMTI), dV/dt and di/dt through parasitics L, and C?-How to separate power ground noise by PCB layout?-Power supply for isolated gate driver in UPS, server and Telecom system-TIDA and Experimental waveforms

In this training video, parasitics in the gate driver system is identified. Piece-wise linear switching sequence at turn on/off is illustrated. Reverse recovery introduced additional complexity on turn-on transition is explained with comparison of MOSFETs and IGBTs.

In this training video, soft switching ZVS converters, including totem-pole PFC and LLC resonant converter, is mentioned to improve all the all the issues of hard-switching, especially the reverse recovery of the diode. Differences of gate driver on hard-switching and soft-switching is highlighted and explained. New issues of soft switching, high turn-off current, is also discussed with strong gate driver to minimize the turn-off loss. LLC resonant converter turn-off loss mechanism is illustrated in depth.

This training video discusses the strong gate driver introduced high dv/dt and di/dt during turn-on and turn-off switching transition, and also illustrate the high dv/dt and di/dt introduced noise through the parasitic capacitance/inductance on high side level-shift and junction capacitance on the bootstrap diode. Solutions with new state-of-the-art gate driver and its key features are introduced and explained.

This training video summarizes the content of this gate driver series and the key references.

In this training series, we will touch the gate driver applications, fundamentals of low side gate driver, high- and low side gate driver and isolated gate driver. And we will surely go deep and help you understand the gate driver design considerations with TI reference design and the corresponding critical waveforms.

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