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29 Results

TX Signal Chain Implementation for Wide Band and High Frequency Signal Generation

Date:
November 10, 2016

Duration:
13:45
The system design for an arbitrary waveform generator (AWG) and its functional blocks, including a discussion of the AWG amplifier path and design methodology.
LMK03328EVM setup

LMK03328 EVM Setup and Programming with TICS Pro GUI

Date:
January 13, 2017

Duration:
08:50
EVM setup and programming using TICS Pro GUI with WEBENCH clock design report to configure and program the device.  The video also covers frequency planning tec
LMK03328 Frequency Margining

LMK03328 Frequency Margining and EEPROM programming with TICS Pro GUI

Date:
January 13, 2017

Duration:
04:41
LMK03328 frequency margining example for generating multiple frequency plan configurations (nominal, margin high, and margin low) and programming these to the E

Design Considerations for Robust Interface Between J6 and Car Displays via FPD-Link [Part 3]

Date:
April 21, 2017

Duration:
03:14
Clock cleaners can be incorporated into a system design if jitter issues continue after PCB guidelines and followed and PLL configurations are optimized.

Get Your Clocks in Sync: Hardware Setup

Date:
August 14, 2017

Duration:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

Get Your Clocks in Sync: Software Setup

Date:
August 7, 2017

Duration:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Get Your Clocks in Sync for JESD204B Data Converters

Date:
September 6, 2017

Duration:
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.

TI Solutions for Clock and Timing

Date:
December 7, 2017

Duration:
15:08
Learn about solutions to common aerospace and defense design challenges to help you simplify designs and improve performance.

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 1

Date:
July 17, 2018

Duration:
07:50
Learn about the high speed multi-channel clocking requirements and challenges.

How to synchronize high speed multi-channel clocks?

Modern high speed end equipment's like oscilloscope, 5G wireless communication tester and RADAR requires multichannel transceiver system. The biggest challenge is to provide the high frequency, low phase noise, multiple synchronized clocks to each transceiver's data converters and local oscillator. This training will explain how to synchronize the high speed multi-channel clocks and expand for high channel count clocks requirement.

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 2

Date:
July 25, 2018

Duration:
09:56
Learn about the JESD204B compliant high speed multichannel synchronized clocking architecture

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 3

Date:
July 25, 2018

Duration:
11:22
Learn about the high channel count clocking solution.
TI's bulk acoustic wave (BAW) clocking technology

TI's Bulk Acoustic Wave Clocking Technology

Date:
February 25, 2019

Duration:
03:02
This video details TI’s Bulk Acoustic Wave (BAW) clocking technology, optimized to improve network performance, reduce BOM and increase immunity to interference

Reduce design risk for Low Earth Orbit satellites and other New Space applications

When: October 8, 2019 2:00 pm
What is NewSpace? What does it mean for satellite design? Explore products that meet quality & reliability requirements for short space flights and LEO designs.

Clocking Solutions for High Speed Multi-Channel Applications

Explore clocking solutions for a variety of high speed multi-channel applications. 

LMK04800 Clock Jitter Cleaner/Distribution Demo

Date:
November 2, 2014

Duration:
05:23
Alan demonstrates the LMK04800 clock jitter cleaner and distribution family including: * Ultra-Low RMS Jitter Performance using low-cost external crystal

Clock Design Tool - Device Simulation

Date:
November 2, 2014

Duration:
08:53
Dean shows clock device simulation using TI's easy-to-use Clock Design Tool.

Clock Design Tool - Getting Started

Date:
November 2, 2014

Duration:
11:48
Dean introduces TI's Clock Design Tool and its easy-to-use graphical user interface

Clock Design Tool - Loop Filter Design

Date:
November 2, 2014

Duration:
05:31
Dean shows how to use TI's Clock Design Tool to quickly do PLL loop filter design. TI Clock Design Tool software is used to aid part selection, loop filter des

Utilizing JESD204B interface in low cost applications

Date:
November 8, 2014

Duration:
02:47
Get an overview of the 4-channel, 50-MSPS DEV-ADC34J22 evaluation module. The board features TI's ADC34J22 ADC, LMK04828 jitter cleaner and THS4541 fully diffe
29 Results
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