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TX Signal Chain Implementation for Wide Band and High Frequency Signal Generation
Date:
Duration:
November 10, 2016
Duration:
13:45
The system design for an arbitrary waveform generator (AWG) and its functional blocks, including a discussion of the AWG amplifier path and design methodology.
Design Considerations for Robust Interface Between J6 and Car Displays via FPD-Link [Part 3]
Date:
Duration:
April 21, 2017
Duration:
03:14
Clock cleaners can be incorporated into a system design if jitter issues continue after PCB guidelines and followed and PLL configurations are optimized.
Get Your Clocks in Sync: Software Setup
Date:
Duration:
August 7, 2017
Duration:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers
Get Your Clocks in Sync: Hardware Setup
Date:
Duration:
August 14, 2017
Duration:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs
Get Your Clocks in Sync for JESD204B Data Converters
Date:
Duration:
September 6, 2017
Duration:
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.
TI Solutions for Clock and Timing
Date:
Duration:
December 7, 2017
Duration:
15:08
Learn about solutions to common aerospace and defense design challenges to help you simplify designs and improve performance.
Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 1
Date:
Duration:
July 17, 2018
Duration:
07:50
Learn about the high speed multi-channel clocking requirements and challenges.
How to synchronize high speed multi-channel clocks?
Modern high speed end equipment's like oscilloscope, 5G wireless communication tester and RADAR requires multichannel transceiver system. The biggest challenge is to provide the high frequency, low phase noise, multiple synchronized clocks to each transceiver's data converters and local oscillator. This training will explain how to synchronize the high speed multi-channel clocks and expand for high channel count clocks requirement.
Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 2
Date:
Duration:
July 25, 2018
Duration:
09:56
Learn about the JESD204B compliant high speed multichannel synchronized clocking architecture
Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 3
Date:
Duration:
July 25, 2018
Duration:
11:22
Learn about the high channel count clocking solution.
Reduce design risk for Low Earth Orbit satellites and other New Space applications
When: October 8, 2019 2:00 pm
What is NewSpace? What does it mean for satellite design? Explore products that meet quality & reliability requirements for short space flights and LEO designs.