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62 Results
M-LVDS backplanes

M-LVDS in Backplanes

Providing discussion on topics related to using M-LVDS in backplane applications supporting data rates up to 250 Mbps and are IEC 61000-4-2 compliant.
TI's bulk acoustic wave (BAW) clocking technology

TI's Bulk Acoustic Wave Clocking Technology

Date:
February 25, 2019

Duration:
03:02
This video details TI’s Bulk Acoustic Wave (BAW) clocking technology, optimized to improve network performance, reduce BOM and increase immunity to interference

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 3

Date:
July 25, 2018

Duration:
11:22
Learn about the high channel count clocking solution.

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 2

Date:
July 25, 2018

Duration:
09:56
Learn about the JESD204B compliant high speed multichannel synchronized clocking architecture

How to synchronize high speed multi-channel clocks?

Modern high speed end equipment's like oscilloscope, 5G wireless communication tester and RADAR requires multichannel transceiver system. The biggest challenge is to provide the high frequency, low phase noise, multiple synchronized clocks to each transceiver's data converters and local oscillator. This training will explain how to synchronize the high speed multi-channel clocks and expand for high channel count clocks requirement.

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 1

Date:
July 17, 2018

Duration:
07:50
Learn about the high speed multi-channel clocking requirements and challenges.

SPI over LVDS for Test & Measurement applications

Date:
July 16, 2018

Duration:
05:06
This video provides an overview of SPI over LVDS implementation for test and measurements applications.

How to Measure Jitter

Date:
June 28, 2018

Duration:
05:05
Learn how to measure jitter using eye diagrams in this short,interactive video.

Webinar - What you need to know about Clock Generators, Buffers and RF Synthesizers

Date:
June 27, 2018

Duration:
54:18
Want to learn more about Clock Generators and Buffers ? You're in the right place!

LVDS Data Rate

Date:
May 9, 2018

Duration:
04:44
This video explains LVDS data rate, including a calculation example using TI's DS90LV011A LVDS driver.

M-LVDS and Communication Topologies

Date:
April 26, 2018

Duration:
07:01
This video expands on the three communication topologies, provides an overview of M-LVDS, explains failsafe, and briefly goes over B-LVDS.

Advantages of LVDS

Date:
April 23, 2018

Duration:
06:35
Deep dive into the advantages of LVDS such as data rate, low power consumption, noise immunity, and EMI reduction for point to point communication interface.
LVDS Series

LVDS Training Series

The LVDS training series is designed for learning the fundamentals of Low Voltage Differential Signalling technology. It begins with an overview of LVDS technology, and then expands on the advantages of using LVDS such as noise immunity, EMI reduction, low power, and etc. Next, M-LVDS and communication typologies commonly used with LVDS/M-LVDS Interface are explained. Typical use case of LVDS interface and how to calculate LVDS data rate are presented in this training series as well. 

LVDS Overview

Date:
April 19, 2018

Duration:
05:49
This video provides an overview of LVDS technology, explains its operation, and clarifies the difference between LVDS and other interfaces.
taillight demo

TPS92830-Q1 RCL Taillight Demo Live at CES

Date:
January 11, 2018

Duration:
01:28
In this live RCL taillight demonstration at CES in Las Vegas, you can see the capabilities of the TPS92830-Q1 Automotive LED controller.

TI Solutions for Clock and Timing

Date:
December 7, 2017

Duration:
15:08
Learn about solutions to common aerospace and defense design challenges to help you simplify designs and improve performance.

TPS92830-Q1 Automotive LED controller demo

Date:
November 28, 2017

Duration:
03:17
The TPS92830-Q1 automotive LED controller allows you to achieve higher power in your automotive lighting design. View the device's capabilities in this video.

Get Your Clocks in Sync for JESD204B Data Converters

Date:
September 6, 2017

Duration:
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.

Get Your Clocks in Sync: Hardware Setup

Date:
August 14, 2017

Duration:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

Get Your Clocks in Sync: Software Setup

Date:
August 7, 2017

Duration:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers
62 Results
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