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TI Precision Labs - Clocks and Timing: Noise in Clock and Timing Systems
This series of videos will cover topics around noise in Clock and Timing systems in both time and frequency domains. Subjects include definitions, characteristics and sources of jitter, phase noise figures of merit and the relationship to jitter. We will analyze system-level impairments such as excessive jitter/phase noise and PLL spurious noise for cause and effect by simulation and direct measurement examples.
TI Precision Labs - Clocks and Timing: System Design Considerations
The videos in this series will discuss distributed vs. centralized clock tree, synchronous vs. free-running designs and other selection criteria requirements to help narrow down a clock tree solution. We will discuss other design considerations including frequency planning, spurious and EMI noise reduction techniques, system clock optimization/tuning and clocking for JESD204 B/C systems.
TI Precision Labs - Clocks and Timing: Phase Lock Loop Fundamentals
This video series will explain the building blocks for Phase Lock Loops (PLL's) such as VCO’s, integer and fractional N frequency dividers, phase detectors and charge pumps. We will provide detailed examples of loop filter design and theory along with the effects of discrete sampling and multiple loops on PLL transient response.
TI Precision Labs - Clocks and Timing: Introduction
This series of videos gives an overview of clock and timing product types with a high-level discussion of architecture, functionality and features for each. The discussion will center around key performance metrics of Oscillators, Clock Buffers, Jitter Cleaners, PLL's, Network Synchronizers will highlight the key parameters and specifications. Applications case examples and tradeoffs between different clock tree building blocks will be presented to illustrate what type of product function is best suited to meet individual system needs.
TI Precision Labs - Clocks and Timing
Develop your clocks and timing expertise with our comprehensive curriculum that ranges from introductory to advanced topics from key terminology to design considerations. Our on-demand courses and tutorials pair theory and applied exercises to deepen the technical expertise of experienced engineers and accelerate the development of those early in their careers.
New content will continue to be added to this series so be sure to check this page for the latest clock and timing lessons!
TI Precision Labs - Clocks and Timing: Jitter and Phase Noise Definition
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TI Precision Labs - Clocks and Timing: Systems Overview
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TI Precision Labs - Clocks and Timing: RF Phase Lock Loop (PLL) and Synthesizer Key Parameters
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TI Precision Labs - Clocks and Timing: Phase Lock Loop Building Blocks Part 2
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TI Precision Labs - Clocks and Timing: Phase Lock Loop Building Blocks Part 1
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TI Precision Labs - Clocks and Timing: Frequency Planning
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Reduce design risk for Low Earth Orbit satellites and other New Space applications
TI Precision Labs
TI Precision Labs (TIPL) is the most comprehensive online classroom for analog signal chain designers. From foundational knowledge to advanced concepts, our logical, sequenced and comprehensive teaching approach is both intuitive and practical. The training series, which includes videos and downloadable reference materials, will deepen the technical expertise of experienced engineers and accelerate the development of those early in their career.
Clock and timing
This series covers a wide variety of high-performance clock and timing topics, including controlling phase noise in communication systems, understanding clock jitter, simplifying clock-tree designs and more.