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29 Results
Fanout Universal Clock Buffers

Engineer It: How to measure additive jitter in fanout buffers

Date:
April 19, 2016

Duration:
12:07
Learn how to properly measure residual noise of clock fanout buffers

Optimize signal integrity and reduce data-transmission errors in performance-critical applications

Date:
November 14, 2015

Duration:
04:18
Improve your system performance by optimizing your signal integrity and reducing data-transmission errors with ultra-low-jitter oscillators.
PSpice for TI - Transient Analysis

PSpice for TI: Transient Analysis

Date:
June 8, 2020

Duration:
03:31
Learn how to perform transient analysis using the checkpoint restart capabilities unique to PSpice® for TI.
PSpice for TI - Parametric Sweep Analysis

PSpice for TI: Parametric Sweep Analysis

Date:
June 8, 2020

Duration:
02:52
Perform parametric sweep analysis and evaluate your circuit’s behavior within PSpice® for TI design and simulation tool.
PSpice for TI - DC Sweep Analysis

PSpice for TI: DC Sweep Analysis

Date:
June 8, 2020

Duration:
01:40
Learn how to use DC nested sweep in the PSpice® for TI tool to determine the output voltage characteristics of a MOSFET circuit.

Utilizing JESD204B interface in low cost applications

Date:
November 8, 2014

Duration:
02:47
Get an overview of the 4-channel, 50-MSPS DEV-ADC34J22 evaluation module. The board features TI's ADC34J22 ADC, LMK04828 jitter cleaner and THS4541 fully diffe
PSpice for TI - Waveform and Plot Settings

PSpice for TI: Waveform and Plot Settings

Date:
June 8, 2020

Duration:
03:03
Configure waveform and plot settings to match your requirements when evaluating a circuit’s performance the PSpice® for TI tool.
PSpice for TI - Measurement Functions

PSpice for TI: Measurement Functions

Date:
June 8, 2020

Duration:
01:56
Use expressions for precise measurements and to easily compare one waveform with another within PSpice® for TI.

Get Your Clocks in Sync: Hardware Setup

Date:
August 14, 2017

Duration:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

Get Your Clocks in Sync: Software Setup

Date:
August 7, 2017

Duration:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Frequency planning and loop filter design using CDCE62005

Date:
November 1, 2014

Duration:
04:14
Planning and loop filter design is now easy using the latest tools available in the CDCE62005 GUI.

Optimize System Performance and Design Time with the LMK03328 Ultra-Low-Jitter Clock Generator

Date:
September 28, 2015

Duration:
07:12
Deepa shows us how easy it is to implement the LMK03328 features in your system design.

システム性能の最適化と設計時間 超低クロック・ジェネレータ LMK03328

Date:
January 13, 2016

Duration:
07:12
今日はTIの最新クロック・ジェネレータLMK03328の性能および機能に関するデモをお見せします。
LMK03328 Frequency Margining

LMK03328 Frequency Margining and EEPROM programming with TICS Pro GUI

Date:
January 13, 2017

Duration:
04:41
LMK03328 frequency margining example for generating multiple frequency plan configurations (nominal, margin high, and margin low) and programming these to the E
LMK03328EVM setup

LMK03328 EVM Setup and Programming with TICS Pro GUI

Date:
January 13, 2017

Duration:
08:50
EVM setup and programming using TICS Pro GUI with WEBENCH clock design report to configure and program the device.  The video also covers frequency planning tec

LMK0033x: Industrys lowest jitter PCIe buffers

Date:
November 8, 2014

Duration:
04:28
Alan demonstrates the performance of the LMK00338 HCSL fanout buffer in combination with the CDCM6208

Processor Innovation in High Speed Data Acquisition Markets

Date:
April 20, 2015

Duration:
01:04
TI brings its system optimized solution with pre-integrated ADCs & DACs to market.
Soldering rework process for oscillators

Reworking oscillators from Texas Instruments

Date:
July 24, 2017

Duration:
03:49
This video demonstrates solder rework of TI's LMK6xxxx oscillator products.

Hercules How to Tutorial: Force a Clock Monitor Failure

Date:
March 10, 2015

Duration:
12:47
This ‘How to Tutorial’ video highlights the clock monitoring circuitry integrated into many Hercules Safety MCUs.  It walks the viewer through an overview of th

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 3

Date:
July 25, 2018

Duration:
11:22
Learn about the high channel count clocking solution.
29 Results
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