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202 Results
TIPL4707 Frequency planning, sampling vs Nyquist, vs harmonics, spurs, etc

Frequency and Sample Rate Planning: Understanding Sampling, Nyquist zones, Harmonics and Spurious Performance in High-Speed ADCs

Date:
October 4, 2017

Duration:
04:25
The concepts and benefits of frequency planning for high speed ADC systems are covered, including sampling rate vs. Nyquist, harmonics and spurs.
TIPL4705 - High Speed Digital-to-Analog Converter (DAC) Output Response

High Speed Digital-to-Analog Converter (DAC) Output Response in NRZ, RZ and RTC (Mixed Mode) Output Modes

Date:
September 15, 2017

Duration:
13:36
The video discusses signal reconstruction, non-ideal & desired response and multi-Nyquist Operation.
Real and Complex Modulation

High Speed Data Converter Signal Processing: Real and Complex Modulation

Date:
September 14, 2017

Duration:
15:45
This video covers phase and amplitude modulation, introduces the concepts of real and complex modulation and provides an example modulation use case.
SAR ADC Power Scaling

TI Precision Labs – ADCs: SAR ADC Power Scaling

Date:
September 11, 2017

Duration:
18:54
This video highlights the considerations for low-power system design.  

Get Your Clocks in Sync for JESD204B Data Converters

Date:
September 6, 2017

Duration:
19:17
This video will explore a reference design that shows how to synchronize multiple high-speed JESD204B data converters.

Get Your Clocks in Sync: Hardware Setup

Date:
August 14, 2017

Duration:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs

Get Your Clocks in Sync: Software Setup

Date:
August 7, 2017

Duration:
04:20
This video demonstrates the software setup of the Multi-Channel JESD204B 15 GHz Clocking Reference Design for DSO, Radar and 5G Wireless Testers

Understanding and Comparisons of High-Speed Analog-to-Digital (ADC) and Digital-to-Analog (DAC) Converter Architectures

Date:
August 2, 2017

Duration:
18:40
Overview of high-speed data converter architectures: pipeline, interleaved, Successive Approximation Register (SAR), DAC current source and current sink.
Jitter vs SNR for High Speed ADCs

The Impact of Jitter on Signal to Noise Ratio (SNR) for High-Speed Analog-to-Digital Converters (ADCs)

Date:
July 31, 2017

Duration:
08:00
Considerations of Clock jitter, the impact on SNR, how to calculate it and minimize noise degradation for High-Speed Analog-to-Digital Converters.
Bandwidth vs Frequency(Subsampling Concepts)

Bandwidth vs. Frequency - Subsampling Concepts

Date:
July 31, 2017

Duration:
09:17
Learn more about subsampling concepts pertaining to bandwidth vs. frequency, including: Nyquist frequency, aliasing, under-sampling, and input bandwidth.
Understanding Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Date:
July 31, 2017

Duration:
18:41
Explore the differences between sample rate and data rate and use decimation or interpolation to decrease or increase the data rate.
Understanding Sampling Rate vs Data Rate, Decimation (DDC) and Interpolation (DUC) Concepts in High Speed Data Converters

Understanding Signal to Noise Ratio (SNR) and Noise Spectral Density (NSD) in High Speed Data Converters

Date:
July 28, 2017

Duration:
14:32
Concepts of Signal to Noise Ratio and Noise Spectral Density; an example on how NSD is used to estimate the DAC output as it pertains to noise floor.

Precision Signal Injector Demo

Date:
June 23, 2017

Duration:
01:01
High Precision Digital to Analog Converter Training with Signal High-Fidelity Source Evaluation Module showcases our most precise data converter, the ADS8900B.
4-20mA input

Designing a Multi-Channel 4-20mA Analog Input Module

Date:
June 21, 2017

Duration:
37:30
This training discusses real-world system requirements for a multi-channel 4-20mA analog input module for programmable logic controller (PLC).
More-Channels-in-Less-Space-New-Trends-In-Highly-Integrated-DACs.png

Webinar - More Channels in Less Space: New Trends in Highly Integrated DACs

Date:
June 20, 2017

Duration:
32:42
How a Highly Integrated Quad Channel Analog output module with Adaptive power management Solves the space demand problem in factory automation

How to Measure ECG: A Guide to the Signals, System Blocks, and Solutions

Welcome to this training series: How to Measure ECG: A Guide to the Signals, System Blocks, and Solutions.

Designing with Delta-Sigma ADCs: System design considerations to optimize performance

Delta-sigma analog-to-digital converters (ADCs) are oversampling converters typically used in applications requiring higher resolution. However, ADCs do not work by themselves. In fact, they require several key components around them, including a front-end amplifier, a voltage reference, a clock source, power supplies, and a good layout. Many devices integrate these features together with the ADC to offer a complete system solution, which simplifies the design for customers and minimizes board space.

Delta-Sigma ADCs Overview

Date:
May 8, 2017

Duration:
04:35
This video will provide an overview of delta-sigma ADC topology.

Getting Best Performance From Your GSPS and RF Sampling ADC Designs

Date:
May 8, 2017

Duration:
28:42
This video will talk about matching networks and clocking requirements for GSPS and RF Sampling ADC Inputs.

Delta-Sigma ADCs - Clocking

Date:
May 4, 2017

Duration:
06:58
This video will focus on the ADC’s clock input.
202 Results
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