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323 Results

High Speed Signal Chain University

High Speed Signal Chain University is your portal to relevant training material on High Speed Data Converters and High Speed Amplifiers including topics related to RF Sampling Converters, JESD204B SerDes standard, and RF Fundamentals.

Choosing the Best ADC Architecture for Your Application: Part 3 – The Delta-Sigma Digital Modulator

Date:
January 27, 2016

Duration:
08:15
This video provides an overview of how delta-sigma ADCs work. The video discusses the typical topology, oversampling, delta-sigma modulators, and more.

Choosing the Best ADC Architecture for Your Application: Part 4 – The Delta-Sigma Digital Filter

Date:
January 27, 2016

Duration:
08:14
This video discusses the delta-sigma digital filter. A typical topology of a delta-sigma converter generally consists of two blocks: a delta-sigma modulator and

multiSPI™ Digital Interface Overview

Date:
February 8, 2016

Duration:
04:29
This video provides a quick overview of TI’s multiSPI™ digital interface. The multiSPI™ digital interface is a digital interface that’s included on precision SA

Choosing the Best ADC Architecture for Your Application

This video series provides information about the differences between the architectures of successive approximation register analog-to-digital converters (SAR ADCs) and delta-sigma ADCs. These videos are intended to help you know how to choose the best ADC architecture for your application.

Additional Information:

Lessons for Precision DACs

This series provides lessons on some basic topics regarding precision digital-to-analog converters (DACs). The videos in this series cover a variety of topics including code-to-code glitch, calibration, common sources for error, and much more. 

Engineer It Analog How-to Training

Engineer It

Engineer It is an educational, “how-to” video series where TI experts provide fundamental knowledge and solutions to overcome design challenges. Here, you can learn how to spin your motor in minutes, avoid amplifier input/output swing limitations, test and isolate power supplies and more from industry experts.

Three-part JESD204B training series

This three-part training series introduces fundamentals and tips for leveraging the JESD204B serial interface standard, which provides board area, FPGA/ASIC pin-count and deterministic latency improvements over traditional LVDS and CMOS interfaces. TI’s JESD204B ADCs, DACs, clock ICs and development tools enable quick evaluation, design and implementation of designs utilizing the JESD204B interface. Learn more today through this on-demand series.

Webinar Series

Join our webinar series, as we explore different industry trends and technologies across our diverse product portfolio. Over the coming months, our experts will cover the latest analog, power management and embedded processing topics, across both automotive and industrial applications.

Tech Days

Technical Seminar

Were you unable to attend Tech Day but want to view the featured content? Did you attend and want to revisit a particular session? This series contains many of the sessions from the embedded processing, power supply design, signal chain, and wireless connectivity tracks. In addition, this series features recordings of select TI demos from the exhibitors hall.

Free webinar - SAR ADCs vs. Delta-Sigma ADCs: Different Architectures for Different Applications

Webinar - SAR ADCs vs. Delta-Sigma ADCs: Different Architectures for Different Applications

Date:
April 4, 2017

Duration:
26:45
This presentation covers the architecture details for the two most common types of precision analog-to-digital converters (ADCs) that are widely used in a variety of consumer, automotive and industrial applications.

High Accuracy AC Analog Input Module for Voltage & Current measurement using High Resolution Precision ADC for Protection Relay

Welcome to the world of power systems. This training session covers quick introduction to power systems and need for protection relay, protection relay modular architecture, AC analog input module (AIM), key specifications, time and frequency domain analysis, coherent, simultaneous and over sampling, selection of ADC and other key components and TI solutions. Design details for TI Design TIDA-00834 and links to TI designs customer can refer when designing AIM.

Designing with Delta-Sigma ADCs: System design considerations to optimize performance

Delta-sigma analog-to-digital converters (ADCs) are oversampling converters typically used in applications requiring higher resolution. However, ADCs do not work by themselves. In fact, they require several key components around them, including a front-end amplifier, a voltage reference, a clock source, power supplies, and a good layout. Many devices integrate these features together with the ADC to offer a complete system solution, which simplifies the design for customers and minimizes board space.

How to Measure ECG: A Guide to the Signals, System Blocks, and Solutions

Welcome to this training series: How to Measure ECG: A Guide to the Signals, System Blocks, and Solutions.

Fast Fourier Transforms (FFT)

Fast Fourier Transforms (FFTs) and Windowing

Date:
April 14, 2017

Duration:
10:46
This video introduces the FFT as well as the concept of windowing to minimize error sources.

Building the SAR ADC Model

Date:
April 14, 2017

Duration:
12:17
This video walks through the process of creating a TINA Spice Model for a SAR ADC.

Refine the Rfilt and Cfilt Values on ADC Drive

Date:
April 14, 2017

Duration:
13:43
This video walks through the process for optimizing the selection of the external R and C values.
Alias and Anti-Alias Filters

Aliasing and Anti-aliasing Filters

Date:
April 14, 2017

Duration:
13:19
This video introduces the concept of frequency domain aliasing and why anti-aliasing filters are needed.

Precision Signal Injector Demo

Date:
June 23, 2017

Duration:
01:01
High Precision Digital to Analog Converter Training with Signal High-Fidelity Source Evaluation Module showcases our most precise data converter, the ADS8900B.

Get Your Clocks in Sync: Hardware Setup

Date:
August 14, 2017

Duration:
02:31
This video demonstrates DEV_CLK skew between two clock outputs of the clocking reference design and the analog channel to channel skew between 2 ADC12DJ3200EVMs
323 Results
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