Hint: separate multiple terms with commas

E.g., 07/20/2019

E.g., 07/20/2019

Hint: separate multiple terms with commas

E.g., 07/20/2019

E.g., 07/20/2019

Sort by:

147 Results

KeyStone I training: turbo decoder co-processor (TCP3D)

Date:
November 9, 2010

Duration:
45:16
Turbo Decoder Co-Processor (TCP3D) provides an overview of TCP3D including key features, modes, drivers, and configuration. Examples are provided.

KeyStone I training: power management

Date:
November 9, 2010

Duration:
24:26
Power Management provides an overview of the C66x power domain topology, power-saving features, power and clocking domains, powers states, and Smart Reflex.

KeyStone I training: network coprocessor (NETCP) overview

Date:
November 9, 2010

Duration:
04:20
Network Coprocessor (NETCP) Overview provides an introduction to the NETCP, which includes the Packet Accelerator (PA), Security Accelerator (SA), and Ethernet Subsystems.

KeyStone I training: NETCP - security accelerator (SA)

Date:
November 9, 2010

Duration:
15:45
NETCP Security Accelerator (SA)takes a look at the motivation behind the SA, the firmware and low level drivers, as well as a usage case for IPSec encryption and decryption.

KeyStone I training: NETCP - packet accelerator (PA)

Date:
November 9, 2010

Duration:
26:36
NETCP Packet Accelerator (PA) takes a look at the motivation behind the PA, the hardware, firmware and low level drivers, as well as a programming use case.

KeyStone I training: multicore software development kit (MCSDK) overview

Date:
November 9, 2010

Duration:
17:42
This session provides an introduction to and overview of the MCSDK.

KeyStone I training: multicore navigator overview

Date:
November 9, 2010

Duration:
36:36
Multicore Navigator Overview provides an introduction to the architecture and functional components of the Multicore Navigator, which includes the Queue Manager Subsystem (QMSS) and Packet DMA (PKTDMA).

KeyStone I training: multicore navigator - queue manager subsystem (QMSS)

Date:
November 9, 2010

Duration:
28:22
Multicore Navigator: Queue Manager Subsystem (QMSS) provides a detailed look at the functional elements of the QMSS and provides information on programming QMSS through the use of registers and low level drivers.

KeyStone I training: multicore navigator - packet DMA (PKTDMA)

Date:
November 9, 2010

Duration:
32:16
Multicore Navigator: Packet DMA (PKTDMA) provides a detailed look at the infrastructure and functional aspects of the PKTDMA and provides information on programming PKTDMA through the use of registers and low level drivers.

KeyStone I training: memory and cache

Date:
November 9, 2010

Duration:
01:01:07
CorePac & Memory Subsystem provides a detailed look at the C66x memory subsystem including the Multicore Shared Memory Controller (MSMC), local & shared memory/cache control, extended memory, and memory protection.

KeyStone I training: introduction to interprocessor communication (IPC)

Date:
November 9, 2010

Duration:
40:28
Introduction to Interprocessor Communication (IPC) provides an overview of the hardware and software that transports data and/or signals between threads of execution in the KeyStone family of C66x multicore devices.

KeyStone I training: instruction set architecture (ISA)

Date:
March 9, 2015

Duration:
30:57
C66x Instruction Set Architecture describes the differences between the TMS320C674x instruction set architecture and the TMS320C66x instruction set included in the KeyStone CorePac.

KeyStone I training: I/O interfaces

Date:
November 9, 2010

Duration:
22:05
I/O Interfaces provides an overview of selected external interfaces on the C66x devices including UART, I2C, SPI, TSIP and EMIF-A.

KeyStone I training: fast fourier transform coprocessor (FFTC)

Date:
November 9, 2010

Duration:
25:22
Fast Fourier Transform Coprocessor (FFTC) presents the architecture and features of the FFT Coprocessor.

KeyStone I training: debug overview

Date:
November 9, 2010

Duration:
42:10
Debug Overview introduces the C66x debug features including triggers, statistics, and traces.

KeyStone I training: C66x CorePac overview - achieving high performance

Date:
October 9, 2010

Duration:
31:03
CorePac: Achieving High Performance discusses how high performance can be achieved within each DSP core. Topics include CorePac architecture, Single Instruction Multiple Data (SIMD), memory access, and software pipelining.

KeyStone I Training: C665x SoC Overview

Date:
March 30, 2012

Duration:
10:26
The KeyStone C665x Architecture Overview provides a high-level view of the C665x device architecture, the processing and memory topologies, acceleration and interface improvements, as well as power saving and debug features. 

KeyStone I training: bootloader overview

Date:
November 9, 2010

Duration:
20:54
This training provides an overview of the bootloader used by the KeyStone I architecture devices.

KeyStone I training: antenna Interface V2 (AIF2)

Date:
November 9, 2010

Duration:
01:17:03
Antenna Interface V2 (AIF2) provides an overview of the architecture and features of AIF Version 2.

KeyStone I C667x DSP SoC Architecture Overview

Date:
March 1, 2012
This module provides a high-level view of the KeyStone I C667x device architecture, the processing and memory topologies, acceleration and interface improvemen
147 Results
arrow-topclosedeletedownloadmenusearchsortingArrowszoom-inzoom-out arrow-downarrow-uparrowCircle-leftarrowCircle-rightblockDiagramcalculatorcalendarchatBubble-doublechatBubble-personchatBubble-singlecheckmark-circlechevron-downchevron-leftchevron-rightchevron-upchipclipboardclose-circlecrossReferencedashdocument-genericdocument-pdfAcrobatdocument-webevaluationModuleglobehistoryClockinfo-circlelistlockmailmyTIonlineDataSheetpersonphonequestion-circlereferenceDesignshoppingCartstartoolsvideoswarningwiki