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153 Results

66AK2Gx Processor Training Series

Similar to existing KeyStone-based SoC devices, the 66AK2Gx enables both the DSP and ARM cores to master all memory and peripherals in the system. This architecture facilitates maximum software flexibility where either DSP- or ARM-centric system designs can be achieved. 

This curriculum provides an in-depth look at the K2G Processors, Processor SDK-Linux and TI-RTOS, and the Programmable Realtime Unit (PRU).

66AK2Gx Processors

The 66AK2Gx DSP + ARM processors are designed for automotive and consumer audio, industrial motor control, smart-grid protection and other high-reliability, real-time, compute-intensive applications. This training provides an overview of the device architecture and the processor cores. It also includes training related to voice and audio processing, as well as additional how-to video topics relevant to the EVMK2G evaluation module.

Application Development Using Processor SDK RTOS

Date:
October 8, 2015
This presentation provides a detailed overview of the application development process using the Processor SDK RTOS release.

Audio System Hardware with Voice as User Interface

Date:
May 17, 2017
Duration:
24:20
This training identifies the hardware components required to build an application with voice recognition capability.  

Building and Running Inter-Processor Communication (IPC) Examples on the AM572x GP EVM

Date:
December 22, 2017
Duration:
04:31
This video demonstrates how to build and run Inter-Processor Communication (IPC) examples on the AM572x GP EVM using Processor SDK Linux.

C Compiler Tips & Tricks

Date:
March 18, 2015
Duration:
58:29
Intended for those new to TI's C/C++ compiler tools. It is a collection of tips and tricks beginners find useful.

C55x Digital Signal Processors Software Overview

Date:
November 21, 2017
This module provides an overview of the software available to developers building applications on TMS320C55x Digital Signal Processors.

C55x Digital Signal Processors Training Series

TI’s TMS320C55x Fixed-Point Digital Signal Processors (DSP) enable high performance and low power through increased parallelism and total focus on power savings. Industry-leading active power enables computationally-intensive applications, such as voice triggering and encoding, to run on battery for extended period of time. Development tools include the award-winning eXpressDSP, Code Composer Studio (CCS), Integrated Development Environment (IDE), DSP/BIOS, optimized DSP and math libraries, and the industry’s largest third-party network.

C6000 Architecture (2 of 15)

Date:
April 9, 2015
Duration:
01:41:39
This training series provides an in-depth look at C6000 architecture such as cache, using the C compiler/optimizer, EDMA3 and a great intro to the architecture

C6000 Cache - Lab (11 of 15)

Date:
April 9, 2015
Duration:
28:59
This training series provides an in-depth look at C6000 architecture such as cache, using the C compiler/optimizer, EDMA3 and a great intro to the architecture

C6000 Cache - Overview (7 of 15)

Date:
April 9, 2015
Duration:
14:29
This training series provides an in-depth look at C6000 architecture such as cache, using the C compiler/optimizer, EDMA3 and a great intro to the architecture

C6000 Cache - Part 1 (8 of 15)

Date:
April 9, 2015
Duration:
22:08
This training series provides an in-depth look at C6000 architecture such as cache, using the C compiler/optimizer, EDMA3 and a great intro to the architecture

C6000 Cache - Part 2 (9 of 15)

Date:
April 9, 2015
Duration:
34:10
This training series provides an in-depth look at C6000 architecture such as cache, using the C compiler/optimizer, EDMA3 and a great intro to the architecture

C6000 Cache - Part 3 (10 of 15)

Date:
April 9, 2015
Duration:
46:51
This training series provides an in-depth look at C6000 architecture such as cache, using the C compiler/optimizer, EDMA3 and a great intro to the architecture

C6000 Embedded Design Workshop

This is a 15 part series covering C6000 embedded design.

C6000 Optimizations - Lab (6 of 15)

Date:
April 9, 2015
Duration:
01:23:28
This training series provides an in-depth look at C6000 architecture such as cache, using the C compiler/optimizer, EDMA3 and a great intro to the architecture

C6000 Optimizations - Overview (3 of 15)

Date:
April 9, 2015
Duration:
29:23
This training series provides an in-depth look at C6000 architecture such as cache, using the C compiler/optimizer, EDMA3 and a great intro to the architecture

C6000 Optimizations - Part 1 (4 of 15)

Date:
April 9, 2015
Duration:
01:09:30
This training series provides an in-depth look at C6000 architecture such as cache, using the C compiler/optimizer, EDMA3 and a great intro to the architecture

C6000 Optimizations - Part 2 (5 of 15)

Date:
April 9, 2015
Duration:
01:01:04
This training series provides an in-depth look at C6000 architecture such as cache, using the C compiler/optimizer, EDMA3 and a great intro to the architecture

Debugging Common Application Issues with TI-RTOS

Date:
May 25, 2016
Duration:
25:26
This presentation shows how TI-RTOS helps a user debug the following common application issues: stack overflows, device exceptions, and memory mismanagement.
153 Results

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