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313 Results

Design Considerations for Robust Interface Between J6 and Car Displays via FPD-Link

Creating a Robust Interface Between  J6 and FPD-Link .

DS90UB953/954 System Design & Operation

The DS90UB953/954 System Design & Operation video series offers training for FPD-Link III devices for ADAS.  FPD-Link III devices such as the DS90UB953-Q1/ DS90UB954-Q1 support sensor use over serial link for Advanced Driver Assist Systems (ADAS) in the automotive industry.  In this training series, we will guide you through step-by-step procedures to initialize and bring-up the “Sensor-Serializer-Deserializer-ISP” link to an optimal performance level. 

SPI Access using the LMH12xx 12G SDI devices

SPI Access using FPGA or ASIC using LMH12XX 12G-SDI Devices

Date:
October 6, 2017

Duration:
12:13
LMH12XX 17-bits SPI interface to FPGA/ASIC 8-bits format is explained.

Automotive Ethernet Systems built on TI Product portfolio

Date:
April 12, 2018

Duration:
22:04
The main focus of this video is on layout aspects for an automotive Ethernet PHY.

Reduce design risk for Low Earth Orbit satellites and other New Space applications

When: October 8, 2019 2:00 pm
What is NewSpace? What does it mean for satellite design? Explore products that meet quality & reliability requirements for short space flights and LEO designs.
Engineer It Analog How-to Training

Interface

These training videos provide a better understanding of industrial interface and digital isolation designs, which enable higher bandwidths and longer transmission distances while reducing system size and complexity.

DS90UB953/954 System Design & Operation: Overview

This introduction video will give the background on FPD-Link III devices, such as the DS90UB953-Q1/ DS90UB954-Q1; the device's role within Advanced Driver Assist Systems (ADAS) in the automotive industry; and explain their broad appeal to engineers of all experience levels. This is fundamental to diving deeper into a 953/954 system, as well as, the links within the system.

DS90UB953/954 System Design & Operation: Typical Customer Issues

This section frames the design and operation video series by showing why it is important to contextualize customer problems in terms of the links between the devices. 

Specifically, this section will discuss: issues with initializing the camera and issues with reading the incorrect serializer ID from the deserializer.

DS90UB953/954 System Design & Operation: Basic Design Rules

Understanding what hardware and software settings are important is critical to establishing a foundation for the 953/954 system. These settings can occur during or after power up and may need to be changed via software. As a result, these settings are routinely checked and verified before checking any of the other links in the system.

Specifically, this sections discusses: Diagnostics post power up, Mode and IDX Pins, Clocking Modes between the 953/954, Aliasing, I2C Pass Through, Port selection on 954, Analog Launch Pad (ALP), and Successful I2C Communication

DS90UB953/954 System Design & Operation: 953-954 Link Design

This section analyzes the link between the 953 and 954 and establishes how to identify the health and operation of the link. Since the link between the 953-954 is the most fundamental link used to communicate between devices, it is often checked first.

Specifically, this section discusses: Back Channel configuration, Built in Self Test (BIST), Adaptive Equalization (AEQ), and Channel Monitor Loop (CMLOUT)

DS90UB953/954 System Design & Operation: Sensor-953 Link Design

This is the Sensor and 953 Link Design section in DS90UB953/954 System Design & Operation video series. This video discusses how to use the sensor-953 link, as well as, the specific settings that are used with this link.

DS90UB953/954 System Design & Operation: 954-ISP/SoC Link Design

This section discusses what frame synchronization (FrameSync) is and how to configure in on the 953 and 954 and how CSI2 data is transferred across the link from the 954 to the ISP/SoC

Specifically, this section discusses: Frame Synchronization (FrameSync), Controlling 953 GPIOs locally and remotely via I2C, Unsynchronized and synchronized sensors, Internal and External Frame Sync, Port Forwarding, Accessing Indirect Registers, and Pattern Generation on 953 & 954

DS90UB953/954 System Design & Operation: Hardware Design

This section discusses how design a 953/954 using Power over Coax (PoC), and various hardware checks and concepts that need to be considered when analyzing a 953/954 system.

Specifically, this section discusses: Power Over Coax (PoC), AC Coupling Capacitors, PoC Inductors, Typical PoC Schematic, Critical Signal Routing, I2C Pullups, Loop Filter Capacitors on 953, Insertion Loss, Return Loss, and Time Domain Reflection (TDR) measurements.

Introduction to FPD-Link SerDes

These introduction videos describe the evolution of FPD-Link product families, and introduction to FPD-Link III SerDes for use in Infotainment and ADAS applications.

Diagnostic & Data Protection

This video series provides an overview of diagnostic capabilities of FPD-Link III and basic tips to simplify troubleshooting.

313 Results
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