For anti-tampering, it is common to try to detect the presence of a strong magnet. In this section, we will cover the use of hall sensors for low-power detection of strong magnetic fields in three dimensions. Details on our magnetic tamper detection reference design, TIDA-00839, will be provided as well as some of the design considerations that were kept in mind when creating this reference design.
In this section, we will cover how to harden a meter against these magnetic tamper attacks by using shunts for current sensors. For poly-phase implementations, I will go over how to use isolated delta sigma modulators to add the necessary isolation to use shunt current sensors and create magnetically immune poly-phase energy measurement systems. The TIDA-00601 and TIDA-01094 reference designs, which show how to implement a poly-phase isolated shunt measurement system, will be discussed as well as the associated AMC1304 high-side power supplies used in these designs.
In this training series, we will touch the gate driver applications, fundamentals of low side gate driver, high- and low side gate driver and isolated gate driver. And we will surely go deep and help you understand the gate driver design considerations with TI reference design and the corresponding critical waveforms.
The first section will discuss the applications where the different kinds of gate driver will be used, and we will also identify the gate drivers location used in each typical system architecture.
This training video will be introducing Popular Power Semiconductors - Si-MOSFETs, IGBTs, SiC-MOSFETs and GaN, and identify the differences among this devices in the perspective the gate driver design and select consideration.
This training video illustrates the operation fundamentals for the low side and half-bridge gate driver.
This training video discusses the gate driver select considerations and key specifications, and also introduces the novel gate driver specs for high end gate driver.
This training series will firstly discuss the isolation requirement in power electronics system, and then compare the different driver isolation implementation methodologies. Integrated isolated gate driver shows the best performance in the perspective of size, performance and reliability.
This training video will firstly discuss the configuration of the UCC2x52x gate driver and it featured benefits, then a detailed bench experiment comparison shows that UCC2x52x family gate drivers has better dynamic performance as well as stable and predictable source/sink peak current.
This training video will help to understand the UCC2152x's output configuration and grounding consideration when driving FETs and IGBTs with negative voltage bias. Three different implementation methods are introduced, pros and cons of each methods are illustrated.
Gate driver design deep dive outline:
-Parasitics in gate driver-Gate driver soft/hard switching difference-Strong gate driver and MOSFET nonlinear COSS-Common mode transient immunity(CMTI), dV/dt and di/dt through parasitics L, and C?-How to separate power ground noise by PCB layout?-Power supply for isolated gate driver in UPS, server and Telecom system-TIDA and Experimental waveforms
In this training video, parasitics in the gate driver system is identified. Piece-wise linear switching sequence at turn on/off is illustrated. Reverse recovery introduced additional complexity on turn-on transition is explained with comparison of MOSFETs and IGBTs.
In this training video, soft switching ZVS converters, including totem-pole PFC and LLC resonant converter, is mentioned to improve all the all the issues of hard-switching, especially the reverse recovery of the diode. Differences of gate driver on hard-switching and soft-switching is highlighted and explained. New issues of soft switching, high turn-off current, is also discussed with strong gate driver to minimize the turn-off loss. LLC resonant converter turn-off loss mechanism is illustrated in depth.
This training video discusses the strong gate driver introduced high dv/dt and di/dt during turn-on and turn-off switching transition, and also illustrate the high dv/dt and di/dt introduced noise through the parasitic capacitance/inductance on high side level-shift and junction capacitance on the bootstrap diode. Solutions with new state-of-the-art gate driver and its key features are introduced and explained.