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206 Results

KeyStone External Interfaces (EMIF-A, UART, I2C, SPI, TSIP)

Date:
November 1, 2010
This module provides an overview of selected external interfaces on KeyStone devices including UART, I2C, SPI, TSIP, and EMIF-A.

KeyStone C66x DSP CorePac Overview

Date:
January 1, 2012
This module discusses how high performance can be achieved within each C66x DSP core. Topics include C66x DSP CorePac architecture, Single Instruction Multiple

KeyStone Instruction Set Architecture (ISA)

Date:
October 1, 2011
This module describes the differences between the TMS320C674x instruction set architecture and the TMS320C66x instruction set included in the KeyStone CorePac.

KeyStone Multicore Navigator

Date:
November 1, 2010
This module provides an introduction to the architecture and functional components of the Multicore Navigator, which includes the Queue Manager Subsystem (QMSS

Introducing the EVMK2G Evaluation Module for 66AK2G02 Processors

Date:
May 11, 2016

Duration:
02:20
Learn more about the EVMK2G Evaluation Module, designed for the 66AK2G02 Multicore DSP + ARM SoC.

KeyStone Serial Rapid IO (SRIO)

Date:
November 1, 2010
This module takes a look at the new features and enhancements of the SRIO on KeyStone devices.

KeyStone FFT Co-Processor (FFTC)

Date:
November 1, 2010
This module presents the architecture and features of the FFT co-processor.

KeyStone Turbo Decoder Co-Processor (TCP3D)

Date:
November 1, 2010
This module provides an overview of TCP3D including key features, modes, drivers, and configuration. Examples are provided.

KeyStone Turbo Encoder Co-Processor (TCP3E)

Date:
November 1, 2010
This module provides an overview of TCP3E including usage, initialization, and configuration. Examples are provided.

KeyStone Bootloader Overview

Date:
November 1, 2010
This module provides an introduction to the C66x bootloader including configuration, device startup, and run-time modes.

Voice Processing Tools and Software for K2G and C5517 Designs

Date:
May 3, 2017

Duration:
17:24
This training addresses some of the basic concepts associated with the voice recognition processing technique known as beamforming.

KeyStone I training: multicore navigator overview

Date:
November 9, 2010

Duration:
36:36
Multicore Navigator Overview provides an introduction to the architecture and functional components of the Multicore Navigator, which includes the Queue Manager Subsystem (QMSS) and Packet DMA (PKTDMA).

KeyStone I training: multicore software development kit (MCSDK) overview

Date:
November 9, 2010

Duration:
17:42
This session provides an introduction to and overview of the MCSDK.

KeyStone I training: bootloader overview

Date:
November 9, 2010

Duration:
20:54
This training provides an overview of the bootloader used by the KeyStone I architecture devices.

KeyStone I Training: C665x SoC Overview

Date:
March 30, 2012

Duration:
10:26
The KeyStone C665x Architecture Overview provides a high-level view of the C665x device architecture, the processing and memory topologies, acceleration and interface improvements, as well as power saving and debug features. 

KeyStone I training: C66x CorePac overview - achieving high performance

Date:
October 9, 2010

Duration:
31:03
CorePac: Achieving High Performance discusses how high performance can be achieved within each DSP core. Topics include CorePac architecture, Single Instruction Multiple Data (SIMD), memory access, and software pipelining.

Introduction to the Processor SDK Training Series

Date:
July 11, 2017

Duration:
02:32
This short video provides an introduction of the Processor SDK training series including how to access and a curriculum overview.

Introduction to Processor SDK RTOS Frequently Asked Questions (FAQ)

Date:
January 26, 2017

Duration:
05:34
This video provides an introduction to the Wiki article where you can find answers when developing real time software using the Processor SDK for RTOS

KeyStone I training: memory and cache

Date:
November 9, 2010

Duration:
01:01:07
C66x memory subsystem overview includes Multicore Shared Memory Controller (MSMC), local/shared memory/cache control, extended memory, and memory protection.

KeyStone I training: instruction set architecture (ISA)

Date:
March 9, 2015

Duration:
30:57
C66x Instruction Set Architecture describes the differences between the TMS320C674x instruction set architecture and the TMS320C66x instruction set included in the KeyStone CorePac.
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