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206 Results

KeyStone I training: power management

Date:
November 9, 2010

Duration:
24:26
Power Management provides an overview of the C66x power domain topology, power-saving features, power and clocking domains, powers states, and Smart Reflex.

KeyStone I training: introduction to interprocessor communication (IPC)

Date:
November 9, 2010

Duration:
40:28
Introduction to Interprocessor Communication (IPC) provides an overview of the hardware and software that transports data and/or signals between threads of execution in the KeyStone family of C66x multicore devices.

KeyStone I training: multicore navigator - queue manager subsystem (QMSS)

Date:
November 9, 2010

Duration:
28:22
Multicore Navigator: Queue Manager Subsystem (QMSS) provides a detailed look at the functional elements of the QMSS and provides information on programming QMSS through the use of registers and low level drivers.

KeyStone I training: NETCP - packet accelerator (PA)

Date:
November 9, 2010

Duration:
26:36
NETCP Packet Accelerator (PA) takes a look at the motivation behind the PA, the hardware, firmware and low level drivers, as well as a programming use case.

KeyStone I training: turbo decoder co-processor (TCP3D)

Date:
November 9, 2010

Duration:
45:16
Turbo Decoder Co-Processor (TCP3D) provides an overview of TCP3D including key features, modes, drivers, and configuration. Examples are provided.

KeyStone I training: debug overview

Date:
November 9, 2010

Duration:
42:10
Debug Overview introduces the C66x debug features including triggers, statistics, and traces.

KeyStone I training: antenna Interface V2 (AIF2)

Date:
November 9, 2010

Duration:
01:17:03
Antenna Interface V2 (AIF2) provides an overview of the architecture and features of AIF Version 2.
Jacinto 7 processors: heterogeneous processing cores

Jacinto 7 processors: heterogeneous processing cores

Date:
December 30, 2019

Duration:
08:08
An introduction to Jacinto™ 7 processing cores and the features and benefits they provide.

Introduction to C55x Digital Signal Processors

Date:
April 8, 2016
This module provides an introduction to the C55x family of DSPs from Texas Instruments.

Programmable Real-Time Unit (PRU) for 66AK2Gx processors

Learn more about our 66AK2Gx processors.

66AK2Gx processor

This video provides an in-depth look at the K2G processors, Processor SDK-Linux and TI-RTOS and the Programmable Realtime Unit (PRU).

66AK2Gx processors

This series provides an overview of K2Gx DSP + ARM devices for a variety of high-reliability, real-time, compute-intensive applications.

Processor SDK for KeyStone™ processors

Our online training provides an introduction to the Processor SDK and how to use this software to start building applications on our processors.

Demonstrating Voice Preprocessing on the EVMK2G

Date:
May 3, 2017

Duration:
06:05
This video demonstrates the voice pre-processing TI design for the EVMK2G platform.

Demonstrating U-Boot from SPI/QSPI for 66AK2G

Date:
March 26, 2018

Duration:
05:58
This video demonstrates how to boot the 66AK2Gx processor using SPI NOR and QSPI flash.

Introduction to AM5K2Ex and 66AK2Ex Processors

Date:
January 28, 2017

Duration:
09:15
This module provides an introduction to AM5K2Ex and 66AK2Ex processors based on the KeyStone II device architecture.

Restoring and Updating U-Boot NAND on OMAP-L138

Date:
August 17, 2018

Duration:
08:03
This video shows how to restore and update the U-Boot image in the NAND flash on the OMAP-L138 LCDK EVM (TMDSLCDK138). 

TI Breaks the $2 DSP Barrier

Date:
November 1, 2014

Duration:
04:37
TI first to break the $2 DSP barrier! Imagine what you could do with a $2 DSP. TMS320C553x ultra-low-power DSPs, the lowest power and lowest cost DSPs in the i

C6-Integra Application Processors

Date:
November 1, 2014

Duration:
05:22
C6-Integra(TM) application processors with true real-time signal processing overview

C6EZAccel Demonstration on DSP+ARM Devices

Date:
November 1, 2014

Duration:
06:21
Using C6EZAccel to offload processing to the DSP on C6-Integra(TM) DSP+ARM devices
206 Results
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