Hint: separate multiple terms with commas

E.g., 10/18/2019

E.g., 10/18/2019

Hint: separate multiple terms with commas

E.g., 10/18/2019

E.g., 10/18/2019

Sort by:

26 Results
Low noise DC/DC

You CAN have both - low noise AND high efficiency

For noise-critical portable applications, such as GPS receivers, connectivity, and sensing, power supply designers always had to choose between longer battery run time (from higher efficiency) or higher signal chain performance (from the increased sensor sensitivity possible with a quieter power supply). For line-powered industrial or communications equipment applications, designers have been forced to dissipate significant amounts of power in LDOs to achieve the desired noise performance. Achieving both low noise and high efficiency was impossible.

Low noise DC/DC

Why place an LDO after a DC/DC?

Understand the performance and tradeoffs of the traditional low noise and high efficiency approach of using a DC/DC followed by an LDO.  Visualize other systems that could use the same approach, with the appropriate DC/DCs and LDOs in different packages and with different features.

Utilizing the AFE74xx TXTDD and RXTDD modes

Date:
March 4, 2019

Duration:
04:15
Learn how to save power by utilizing the AFE74xx TXTDD and RXTDD modes.

Selecting the right configuration mode with the AFE74xx EVM

Date:
March 1, 2019

Duration:
03:27
Learn how to select the desired mode to configure the AFE.

RF Sampling Series

This series explores the new realm of RF sampling converters for use in high frequency, large bandwidth systems.

Optimize Your RF Sampling ADC Receiver Performance with the Frequency & Sample Rate Planning Calculator

Optimize Your RF Sampling ADC Receiver Performance with the Frequency & Sample Rate Planning Calculator

Date:
April 6, 2018

Duration:
34:18
This video will go over what ADC SFDR's are, explain the concept of frequency planning and provide tools to help with RF sampling design. 
Low noise DC/DC

Lower noise for a negative output voltage rail

What you will learn in this webinar:

  • How to achieve a low noise at a negative output voltage with the inverting buck topology
  • Understanding how the buck output stage and filtered reference voltage attenuate noise
  • The elimination of LDOs when powering data converters by utilizing these low-noise features

Lower noise for a negative output voltage rail

Date:
March 26, 2019

Duration:
05:46
You can have BOTH low noise and high efficiency on a negative voltage with just a DC/DC and no LDO.

JESD204B Video Blog Series

The JESD204B video blog series explores the basic concepts related to the JESD204B SerDes standard in relation to High Speed Data Converter products.

Introduction to the RF Sampling Architecture

Date:
June 29, 2015

Duration:
03:21
Introduction to the RF sampling architecture in contrast to traditional direct conversion architectures typically used in existing transceivers.

How to enable the loopback mode feature with the AFE74xx EVM

Date:
March 4, 2019

Duration:
03:59
Learn how to enable the loopback mode feature with the AFE74xx EVM.

How to configure the RX NCOs using the AFE74xx EVM

Date:
March 4, 2019

Duration:
05:46
Learn how to configure the RX NCO settings, in single band mode, using the AFE74xx EVM.

How to configure the AFE74xx in Mode 4 using an external clock

Date:
March 4, 2019

Duration:
05:04
Learn how to program the AFE74xx EVM using an external clock.

How to configure the AFE74xx EVM in transceiver mode

Date:
March 4, 2019

Duration:
02:03
Learn how to operate the AFE74xx EVM in transceiver mode.

How to configure the AFE74xx DAC in Mode 4 using the internal PLL

Date:
March 1, 2019

Duration:
04:55
Learn how to configure the DAC in mode 4 with the AFE74xx EVM

How to configure the AFE74xx ADC in Mode 4 using the internal PLL

Date:
March 1, 2019

Duration:
02:33
Learn how to capture with the ADC in mode 4 with the AFE74xx EVM.

High Speed Signal Chain University

High Speed Signal Chain University is your portal to relevant training material on High Speed Data Converters and High Speed Amplifiers including topics related to RF Sampling Converters, JESD204B SerDes standard, and RF Fundamentals.

Hardware setup for internal PLL operation with the AFE74xx EVM

Date:
March 1, 2019

Duration:
02:42
Learn how to set up the hardware for internal PLL clock operation.

Hardware setup for external clock operation with the AFE74xx EVM

Date:
March 4, 2019

Duration:
03:10
Learn how to set up the hardware to configure the AFE74xx EVM, in mode 4, using an external clock.

Getting started with the AFE74xx RF-sampling transceiver

Quickly evaluate the AFE7444 and/or AFE7422 RF-sampling transceiver with this series of how to videos.
26 Results
arrow-topclosedeletedownloadmenusearchsortingArrowszoom-inzoom-out arrow-downarrow-uparrowCircle-leftarrowCircle-rightblockDiagramcalculatorcalendarchatBubble-doublechatBubble-personchatBubble-singlecheckmark-circlechevron-downchevron-leftchevron-rightchevron-upchipclipboardclose-circlecrossReferencedashdocument-genericdocument-pdfAcrobatdocument-webevaluationModuleglobehistoryClockinfo-circlelistlockmailmyTIonlineDataSheetpersonphonequestion-circlereferenceDesignshoppingCartstartoolsvideoswarningwiki