To help explore infinite design possibilities with TI Sitara™ ARM® Processors, Texas Instruments has created the Sitara ARM Processors Boot Camp. This modular training series for TI’s Sitara ARM Processors is based on the latest development kits from TI and provides in-depth technical discussion and hands-on exercises for all aspects of the solution; from architecture to peripherals to software and development environments.
The "Linux Board Porting" online series is comprised of nine, 10-minute modules (3 Lecture and 6 Lab) that provide an introduction to porting U-boot and the Linux Kernel to custom hardware platforms.
Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS / PRU-ICSSG) Training Series
The Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS / PRU-ICSSG) is a small processor that is tightly integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices including the AM335x, AM437x, AM57x, and AM65x Sitara Processors. The PRU-ICSS / PRU-ICSSG is customer-programmable and can be used to implement simple and flexible control functions, peripherals, and state machines that directly access IO pins of the device, as well as can communicate with the application cores.
TI’s AM437x processors, along with the Processor SDK, deliver unrivaled integration, scalability, peripherals and ease of use associated with the powerful Sitara processor platform. The Sitara AM437xx processor architecture includes ARM® Cortex®-A9 cores, programmable real-time units (PRU), video and graphic accelerators, and customer-programmable secure boot make the AM437xx processors unmatched in their class.
Linux is well-adopted within embedded systems. But debugging Linux system issues can be overwhelming. This training series teaches the techniques of debugging kernel issues that may be encountered in embedded Linux systems. This training series explains the Linux kernel logging system and logging API, illustrates how to locate a particular device driver, and demonstrates how to read kernel oops logs.
This training series looks at High Availability Seamless Redundancy (HSR) and Parallel Redundancy Protocol (PRP), which are fundamental to many of the tightly-synchronized, high-reliability systems being built today. HSR and PRP work together or separate to keep systems working even when things break so that power stays on and things keep getting built. Both of them work in the low levels of the Ethernet stack to provide the applications that they serve these fundamental capabilities.
Advanced closed-loop control systems for factory, process, and power automation markets require powerful MCU solutions that can interface to variety of industrial communications protocols. As new features and capabilities are added, these protocols may evolve several times during the lifetime of an industrial product. As a result, system providers can benefit from solutions that flexibly support multiple communications protocols and in-service updates without updating hardware.
This training presents TI’s ready-to-use EtherCAT masters solutions for Sitara processors. EtherCAT master on Sitara runs on different operating systems, including TI-RTOS and RT Linux. It also runs on the EMAC interfaces (CPSW and PRU ICSS_EMAC) of any Sitara device, including AM57x, AM437x, and AM335x.
This training series provides background on embedded systems startup to enable users of the AM3x/AM4x/AM57x Sitara processors to make choices that reduce boot time during system design of a selected processor. It introduces the boot time components of the catalog processors, system, and the Processor Linux Software Development Kit (PLSDK). It provides first steps and capabilities to reduce boot time using the Processor SDK without significant customization. This presentation also gives developers a look beyond just the initialization of the selected OS.