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Interfacing multiple analog-to-digital converters on a Sitara™ processor

In this training series, we demonstrate how to use the PRU-ICSS subsystem on a Sitara processor to interface between multiple SAR ADCs using SPI.

Webinar: Solve smart meter design needs

Solve smart meter design needs in metrology, backup power, wireless communications & battery monitoring

Date:
May 10, 2019

Duration:
43:20
Introduction to new reference designs for smart meters
How to solve design challenges on interfacing Ethernet PHY with application processor or microcontrollers

How to solve design challenges on interfacing Ethernet PHY with application processor or microcontrollers

Date:
April 30, 2019

Duration:
22:01
This video shows how to solve design challenges on interfacing Ethernet PHY with application processor or microcontrollers.

Introduction to rapid prototyping: Getting started with TI solutions

Date:
September 24, 2019

Duration:
02:18
This training shows you how to get started prototyping on TI solutions with minimal or no programming.

Flexible interface (PRU-ICSS) for data acquisition using multiple ADCs

Date:
June 3, 2019

Duration:
07:11
This video covers flexible interface between the PRU-ICSS and multiple ADCs to achieve simultaneous and coherent sampling (TIDA-01555).

Sitara™ Processors Building Blocks for PRU Development Summary

Date:
October 30, 2015
This session provides an overview of the Programmable Real-Time Unit (PRU) subsystem, device and IO integration, and programming model.

Sitara™ Processors Building Blocks for PRU Development

TI's Building Blocks for PRU Development online training includes an overview of the PRU subsystem, device and IO integration, application design, and programming model.

TSN on Sitara™ processors

Date:
March 2, 2018

Duration:
03:20
This video showcases the ability to implement a Time-sensitive Networking (TSN) switch on the AM572x Industrial Development Kit (IDK).

Closed-loop Delfino Control Systems: Implementation of AMIC110 Multiprotocol Industrial Communications Solutions

Date:
April 17, 2017

Duration:
13:45
This training presents the AMIC110 architecture and shows how it interfaces with the Delfino MCU. It also provides an overview of TIDA-00299.

Sitara™ Processors Building Blocks for PRU Development: Firmware

Date:
March 30, 2016
The Programmable Real-Time Unit is a small processor that is integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices

Sitara™ Processors Building Blocks for PRU Development: Hardware

Date:
March 30, 2016
The Programmable Real-Time Unit is a small processor that is integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices

Sitara™ Processors Building Blocks for PRU Development: Designing a PRU Application

Date:
May 25, 2016
The Programmable Real-Time Unit (PRU) is a small processor that is integrated with an IO subsystem, offering low-latency control on TI’s SoC devices

PRU for Sitara Processors

The Programmable Real-Time Unit (PRU) is a small processor that is tightly integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices including the AM335x, AM437x, and AM57x Sitara Processors. The PRU is customer-programmable and can be used to implement simple and flexible control functions, peripherals, and state machines that directly access IO pins of the device, as well as can communicate with the application cores. TI's online training for PRU provides an introduction to development and debugging.

Programmable Real-Time Unit and Industrial Communications Subsystem Training Series

The Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS / PRU-ICSSG) is a small processor that is tightly integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices including the AM335x, AM437x, AM57x, and AM65x Sitara Processors. The PRU-ICSS / PRU-ICSSG is customer-programmable and can be used to implement simple and flexible control functions, peripherals, and state machines that directly access IO pins of the device, as well as can communicate with the application cores.

Rapid prototyping conclusions

Conclusion of rapid prototyping with call to action examples, simple and complex demonstrations.

Ethernet System Software on Sitara AM-Class Processors

Date:
October 26, 2016
This module examines the Common Platform Ethernet Switch (CPSW) on Sitara AM-class processors (AM335x, AM437x, AM57x) from a software perspective. It starts by

The McASP Primer: Practical Examples - Transmitter & SYNC

Date:
January 25, 2019

Duration:
12:51
This training provides practical examples of using the Multi-channel Audio Serial Port (McASP) in transmitter and SYNC mode.
Rapid prototyping training series

Rapid prototyping: Getting started with TI solutions

How many times have you said, “I would like to prototype an idea with TI silicon but I can not get software resources" or “I don’t know how to prototype/program.”

This training shows you how to get started prototyping on TI solutions with minimal or no programming, including the following tasks:

Rapid prototyping conclusion based on call to action examples

Date:
October 11, 2019

Duration:
01:51
This module starts the conclusion of rapid prototyping with call to action examples.

Sitara™ Processors: Debug PRU Using Code Composer Studio (CCS)

Date:
October 30, 2015
This presentation provides a step-by-step process on how to get started debugging the Programmable Real-Time Unit (PRU) using Code Composer Studio (CCS). The PRU is a small processor that is tightly integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices including the AM335x, AM437x, and AM57x Sitara Processors.
102 Results
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