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79 Results

Building an Industrial ARM: Processors, interconnects, and memory

Date:
November 20, 2019

Duration:
17:28
This training looks at functional features of the AM65x Sitara architecture that overcome the challenges of industrial Arm processing in factory automation.

Building an Industrial ARM: PRU-ICSSG subsystem

Date:
November 20, 2019

Duration:
06:37
This training looks at the PRU-ICSSG, one of critical industrial features of the AM65x Sitara architecture that enables Time-Sensitive Networking (TSN).

Programmable Real-time Unit for Gigabit Industrial Communication Subsystem (PRU-ICSSG): Accelerators

Date:
November 4, 2019

Duration:
14:33
This training introduces the accelerators for the PRU-ICSSG, the Gigabit-speed industrial communications subsystem included on the Sitara AM6x processors.
Rapid prototyping based on embedded wireless system

Rapid prototyping based on embedded wireless system

Date:
October 4, 2019

Duration:
10:15
This module covers more user interface concepts (specifically, a wireless Linux host connected by WiFi) and how they are used for control in rapid prototyping.
Rapid prototyping based on embedded wired system

Rapid prototyping based on embedded wired system

Date:
October 4, 2019

Duration:
20:46
This module covers more user interface concepts (specifically, a Linux host wired over USB) and how they are used for control in rapid prototyping.

Introduction to OpenCL: Overview

Date:
July 29, 2019

Duration:
22:00
This video provides an overview of OpenCL Parallel Language for Heterogeneous Model support on Sitara AM57x & KeyStone 66AK2Ex, 66AK2Hx, and 66AK2Gx processors.

Decoding PRU-ICSS (hardware and software) for data acquisition

Date:
June 3, 2019

Duration:
17:39
This video dives deeper into the details of the Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS).
How to solve design challenges on interfacing Ethernet PHY with application processor or microcontrollers

How to solve design challenges on interfacing Ethernet PHY with application processor or microcontrollers

Date:
April 30, 2019

Duration:
22:01
This video shows how to solve design challenges on interfacing Ethernet PHY with application processor or microcontrollers.

AM6x Flash Subsystem (FSS): HyperBus™ Memory Controller (HBMC), HyperBus, HyperRAM™, and HyperFlash™

Date:
March 14, 2019

Duration:
13:22
This is the 3rd of 3 training modules providing an introduction to the Sitara AM6x Flash Subsystem (FSS), which interfaces to OSPI and Hyperbus devices.

The McASP Primer Training Series

This training series focuses on hardware design for the Multi-channel Audio Serial Port (McASP).

The McASP Primer: Bonus Material

Date:
January 25, 2019

Duration:
06:43
This training provides information on 48 kHz frame sync generation and audio FIFO configuration with the Multi-channel Audio Serial Port (McASP).

The McASP Primer: Practical Examples - Transmitter & SYNC

Date:
January 25, 2019

Duration:
12:51
This training provides practical examples of using the Multi-channel Audio Serial Port (McASP) in transmitter and SYNC mode.

The McASP Primer: Practical Examples - Receiver

Date:
January 25, 2019

Duration:
09:11
This training provides practical examples of using the Multi-channel Audio Serial Port (McASP) in receiver mode.

The McASP Primer: Fundamentals

Date:
January 24, 2019

Duration:
13:13
This training provides an overview of the fundamentals of the Multi-channel Audio Serial Port (McASP).

What's new with protection relays & Sitara™ processors

Date:
October 30, 2018

Duration:
01:29
Brush up on your knowledge of protection relays and their key design challenges while discovering how Sitara processors help to solve those challenges.

AM6x Sitara Processors: Architecture Overview

Date:
October 22, 2018

Duration:
20:39
This training provides an introduction to the architecture of the AM6x Sitara processors, including the functional subsystems and components.

AM65x Sitara GP EVM Board Tour

Date:
September 28, 2018

Duration:
01:24
This video provides an introduction to the AM65x Sitara Processors General Purpose Evaluation Module (TMDX654GPEVM) for industrial application development.

How to Enable a USB Device Driver in Processor SDK Linux

Date:
September 21, 2018

Duration:
08:50
This video shows how to enable a USB device driver in TI Processor SDK Linux.

Demonstrating DDR-less EtherCAT Slave on AMIC110

Date:
September 8, 2018

Duration:
20:00
This video demonstrates the DDR-less EtherCAT reference design for a completely new and low-cost, DDR-less, EtherCAT slave implementation on the AMIC110 SoC.

Introduction to the Linux Board Port Overview for Sitara AM-Class Processors Training Series

Date:
July 4, 2018

Duration:
02:11
This video provides an introduction to the Linux Board Port Overview for Sitara AM-Class Processors training series.
79 Results
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