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89 Results
Jitter vs SNR for High Speed ADCs

The Impact of Jitter on Signal to Noise Ratio (SNR) for High-Speed Analog-to-Digital Converters (ADCs)

Date:
July 31, 2017

Duration:
08:00
Considerations of Clock jitter, the impact on SNR, how to calculate it and minimize noise degradation for High-Speed Analog-to-Digital Converters.

Power factor correct (PFC) basics and design considerations

Applications Engineer Jason Tao discusses PFC basics, topology comparisons and design considerations to achieve a cost-optimized and efficient PFC design.

C2000 Devices in Sensing and DSP Processing Applications

C2000™ Devices in Sensing and DSP Processing Applications

Learn how C2000 devices excel in sensing and DSP processing applications.

Low EMI and Noise performance with DC/DC switching regulators

Achieving low noise and low EMI performance with DC/DC switching regulators

Mitigating switching regulator EMI and noise is seen by engineers as a black art. Mess with the feng shui of the PCB layout too much, and the system may not pass CISPR standards. Because of this, many power designers simply turn to linear regulators as a guaranteed way to avoid the headache of reducing emissions.

Applications for isolated gate drivers, including three-phase power factor correction, solar string inverters, motor drives, and traction inverters

TI Precision Labs - Isolation: Applications for Isolated Gate Drivers

Date:
April 30, 2018

Duration:
12:26
This section of the TI Precision Labs - Isolation series explores PFC, solar inverter, motor drive, and traction inverter applications for isolated drivers.

How to synchronize high speed multi-channel clocks?

Modern high speed end equipment's like oscilloscope, 5G wireless communication tester and RADAR requires multichannel transceiver system. The biggest challenge is to provide the high frequency, low phase noise, multiple synchronized clocks to each transceiver's data converters and local oscillator. This training will explain how to synchronize the high speed multi-channel clocks and expand for high channel count clocks requirement.

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 2

Date:
July 25, 2018

Duration:
09:56
Learn about the JESD204B compliant high speed multichannel synchronized clocking architecture

Synchronization of High Speed Multichannel JESD204B Compliant Clocks Part 3

Date:
July 25, 2018

Duration:
11:22
Learn about the high channel count clocking solution.

EtherCAT® DDR-less on Sitara™ AMIC110 and C2000™ MCUs

Date:
November 10, 2018
This demo highlights a DDR-less implementation of EtherCAT® slave on the Sitara AMIC110.
Precision DAC

Demystifying circuit design with Precision DAC Part 2

Date:
December 7, 2018

Duration:
15:38
Part 2: In this speaker addresses the resistor ladder (3-bit), the theory and the way it works. Also introduce the R-2R DAC’s advantage, disadvantage and the ap
Time of Flight & LIDAR (ToF) - Optical Front End Reference Design

Time of Flight & LIDAR - Optical Front End Reference Design

Date:
December 13, 2018

Duration:
04:46
Reference design overview that showcases TI high speed amplifiers, comparators, and time-to-digital converters in a optical time of flight (ToF) system.
Precision DAC

Demystifying circuit design with Precision DAC Part 3

Date:
December 7, 2018

Duration:
10:30
Part 3: Some people may be confuses about the zero code error and offset error. In this session, speaker also briefs on the gain error, DNL, monotonicity...etc.
Precision DAC

Demystifying circuit design with Precision DAC Part 4

Date:
December 10, 2018

Duration:
14:19
Part 4: In this part, the speaker further introduces Glitch and its sources, major carry transition, glitch vs. DAC structure, glitch reduction techniques … etc
Precision DAC

Demystifying circuit design with Precision DAC Part 1

Date:
December 7, 2018

Duration:
14:53
Part 1: Speaker starts from a Precision DAC portfolio table to introduce the features as well as the popular application in the industrial market.
battery tester battery test equipment Jerry Chen Taras Dudar

System design of DC source for battery test equipment

Date:
March 27, 2019

Duration:
25:15
This training presents the battery test equipment system design that addresses the key challenges faced by customers.

Designing wide input DC/DC converters for precision data acquisition applications

Date:
April 5, 2019

Duration:
05:06
Designing wide input DC/DC converters for precision data acquisition applications
Over-voltage Protection- Integrated Protection Multiplexers

System Level Protection for High-Voltage Multiplexers in Multi-Channel Data Acquisition Systems- Multiplexers with Integrated Fault Protection

Date:
April 16, 2019

Duration:
06:16
System Level Protection for High-Voltage Multiplexers in Multi-Channel Data Acquisition Systems- Multiplexers with Integrated Fault Protection
Over-voltage Protection- Comparison and conclusion

System Level Protection for High-Voltage Multiplexers in Multi-Channel Data Acquisition Systems- Comparison and conclusion

Date:
April 4, 2019

Duration:
05:32
System Level Protection for High-Voltage Multiplexers in Multi-Channel Data Acquisition Systems- Comparison and conclusion
89 Results
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