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52 Results

Demonstrate the Sitara™ AM335x GP EVM DCAN Board-to-Board Example from Processor SDK RTOS

Date:
March 17, 2017

Duration:
03:51
This video demonstrates the hardware setup procedure, software compilation, and execution of the AM335x General Purpose EVM.

AM65x Sitara GP EVM Board Tour

Date:
September 28, 2018

Duration:
01:24
This video provides an introduction to the AM65x Sitara Processors General Purpose Evaluation Module (TMDX654GPEVM) for industrial application development.
Getting Started with the EVMK2EX

Getting Started with the EVMK2EX Development Board for 66AK2Ex and AM5K2Ex Processors

Date:
February 16, 2016

Duration:
04:21
The XEVMK2EX is a full-featured development tool for 66AK2Ex and AM5K2Ex KeyStone II-based SOCs. Get started developing general purpose embedded processor compu

C Compiler Tips & Tricks

Date:
March 18, 2015

Duration:
58:29
Intended for those new to TI's C/C++ compiler tools. It is a collection of tips and tricks beginners find useful.

Building and Running Inter-Processor Communication (IPC) Examples on the AM572x GP EVM

Date:
December 22, 2017

Duration:
04:31
This video demonstrates how to build and run Inter-Processor Communication (IPC) examples on the AM572x GP EVM using Processor SDK Linux.

How to Use the PRU to Control a Peripheral: PRU_ADC_onChip on Sitara 335x using Beaglebone Black

Date:
December 21, 2018

Duration:
10:45
This video shows how to use the PRU core to control a peripheral on a TI processor with a PRU-ICSS/ICSSG. In this case, to control ADC on Sitara AM335x.

Audio System Hardware with Voice as User Interface

Date:
May 17, 2017

Duration:
24:20
This training identifies the hardware components required to build an application with voice recognition capability.  

How to Run Processor SDK RTOS Board Diagnostics Using SD Card

Date:
May 8, 2018

Duration:
08:03
This video introduces board Processor SDK RTOS board diagnostics and shows how to build and run the tests on embedded processor platforms using the MMCSD card.

KeyStone I training: antenna Interface V2 (AIF2)

Date:
November 9, 2010

Duration:
01:17:03
Antenna Interface V2 (AIF2) provides an overview of the architecture and features of AIF Version 2.

Demonstrating U-Boot from SPI/QSPI for 66AK2G

Date:
March 26, 2018

Duration:
05:58
This video demonstrates how to boot the 66AK2Gx processor using SPI NOR and QSPI flash.

Programmable Real-time Unit for Gigabit Industrial Communication Subsystem (PRU-ICSSG): Accelerators

Date:
November 4, 2019

Duration:
14:33
This training introduces the accelerators for the PRU-ICSSG, the Gigabit-speed industrial communications subsystem included on the Sitara AM6x processors.

Enabling Multi-protocol Industrial Ethernet with the PRU-ICSS on TI's Sitara™ Processors

Date:
June 20, 2016

Duration:
44:04
In this webinar, learn how you can leverage Multi-protocol industrial Ethernet support with Sitara™ processor portfolio in your design.

KeyStone I training: I/O interfaces

Date:
November 9, 2010

Duration:
22:05
I/O Interfaces provides an overview of selected external interfaces on the C66x devices including UART, I2C, SPI, TSIP and EMIF-A.

KeyStone I training: network coprocessor (NETCP) overview

Date:
November 9, 2010

Duration:
04:20
Network Coprocessor (NETCP) Overview provides an introduction to the NETCP, which includes the Packet Accelerator (PA), Security Accelerator (SA), and Ethernet Subsystems.

Programmable Real-time Unit for Gigabit Industrial Communication Subsystem (PRU-ICSSG): Cores, I/Os & Peripherals

Date:
July 9, 2019

Duration:
09:40
This training provides an overview of the cores, I/Os, and peripherals for the PRU-ICSSG subsystem on Sitara AM6x processors.

Programmable Real-time Unit for Gigabit Industrial Communication Subsystem (PRU-ICSSG): Overview

Date:
January 25, 2019

Duration:
06:49
This training provides an introduction to the PRU-ICSSG, including hardware basics, feature comparisons to PRU-ICSS, and new applications that are supported.

AM6x Sitara Processors: Architecture Overview

Date:
October 22, 2018

Duration:
20:39
This training provides an introduction to the architecture of the AM6x Sitara processors, including the functional subsystems and components.

Decoding PRU-ICSS (hardware and software) for data acquisition

Date:
June 3, 2019

Duration:
17:39
This video dives deeper into the details of the Programmable Real-Time Unit and Industrial Communications Subsystem (PRU-ICSS).

How to Choose a Sitara Processor for Industrial Communication

Date:
September 29, 2017

Duration:
04:15
The video matches industrial communications protocols to the TI embedded processors on which they are supported, including Sitara and 66AK2Gx.
Jacinto 7 processors: flash, storage, and serial connectivity

Jacinto 7 processors: flash, storage, and serial connectivity

Date:
December 30, 2019

Duration:
04:35
An introduction to storage and serial connectivity features on Jacinto™ 7 processors.
52 Results
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