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4088 Results

66AK2Gx Processors

The 66AK2Gx DSP + ARM processors are designed for automotive and consumer audio, industrial motor control, smart-grid protection and other high-reliability, real-time, compute-intensive applications. This training provides an overview of the device architecture and the processor cores. It also includes training related to voice and audio processing, as well as additional how-to video topics relevant to the EVMK2G evaluation module.

Processor SDK for KeyStone Processors

TI provides key runtime software components and documentation to further ease development. TI’s online training provides an introduction to the Processor SDK and how to use this software to start building applications on TI processors.

PRU for 66AK2Gx Processors

The Programmable Real-Time Unit (PRU) is a small processor that is tightly integrated with an IO subsystem, offering low-latency control of IO pins on TI’s SoC devices including the 66AK2Gx, AM335x, AM437x, and AM57x Processors. The PRU is customer-programmable and can be used to implement simple and flexible control functions, peripherals, and state machines that directly access IO pins of the device, as well as can communicate with the application cores.

JESD204B overview

The introduction of the JESD204B interface for the use between data converters and logic devices has provided many advantages over previous-generation LVDS and CMOS interfaces – including simplified layouts, skew management and deterministic latency. However, understanding this interface and applying it to a signal chain design may seem like a daunting task. This training provides an overview of the important aspects of the JESD204B interface, and how it is used in real-world applications.

JESD204B debug, tools and tips

While JESD204B offers various benefits, bringing up a link for the first time can be a challenge if not properly prepared. This training provides tips, guidelines, tools and examples that assist in the bring-up of a JESD204B interface link. Content includes: configuration planning, board schematic and layout guidelines, HSP JESD204B foundation tools and additional information.

JESD204B multi-device synchronization

Multi-device synchronization has always been a challenge with ADCs and DACs. This remains true even with the new JESD204B high-speed data converter digital interface. While the JESD204B interface simplifies some issues with synchronization, it also adds some additional complexity. This presentation discusses the advantages and disadvantages of JESD204B regarding multi-device synchronization, and helps engineers understand and work through the main issues in achieving multi-device synchronization.

2016 工業應用技術專題

Introduction to TI Design - Precision Labs

Overview of TI Design for High Voltage multichannel Data Acquisition, recommended product selection, simulation and PCB layout tips.

Buck Converter Basics

  • Common Operation of Step-Down (Buck) Converters
  • Buck Converter Common Operation:  Switching Frequency
  • Duty /Density Change  VM/CM vs HM

Loop Compensation study for Voltage Mode / Current Mode / Hysteretic Mode Control

Buck Converter Loop Compensation overview for:  Voltage / Current / Hysteretic Mode control

Comparison of the large signal load transient response

Large signal load transient response:  Basic Comparison

Comparison of the large signal load transient response: Continued

Large Signal Load Transient Response: Parameter Comparison

Line transient response comparison

Comparison  for the line transient response for Voltage/Current/Hyestertic mode control

4088 Results
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