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Scalable Digital Cockpit Solutions Powered by Jacinto™ Automotive SoCs
Date:
Duration:
January 10, 2018
Duration:
01:16
Innovate and scale using a common platform and rich software ecosystem for infotainment, cluster, and integrated cockpit solutions.
Digital Cockpit Integration running on DRA76x SoC
Date:
Duration:
January 7, 2017
Duration:
01:13
MultiOS Infotainment and 60fps Digital Cluster display running on a single DRA76x SoC with surround view and latest digital radio and audio features.
Integrated Digital Cockpit with Jacinto™ DRA76x
Date:
Duration:
January 11, 2018
Duration:
01:22
Digital cluster and head unit leverage the performance and integration of one Jacinto DRA76x SoC to power a multi-OS integrated cockpit with 3D surround view.
Scalable Digital Cockpit Solutions Using "Jacinto 6" Family
Date:
Duration:
January 7, 2017
Duration:
01:32
TI's "Jacinto 6" family of automotive processors provides a scalable digital cockpit solution ranging from the entry to premium automotive segment.
Jacinto 6 processor reconfigurable digital instrument cluster
Date:
Duration:
October 14, 2015
Duration:
01:58
A high-quality, fully reconfigurable digital cluster solution demo enabled by Jacinto 6 infotainment SoCs – 3D graphics capabilities with a 60 fps display refre
Jacinto 7 Automotive SOCs: Platform Scalability
Date:
Duration:
January 7, 2020
Duration:
01:42
Jacinto 7 platform delivers scalable performance across automotive appilcations
Optimizing your automotive system with Jacinto™ 7 SoCs and MCU integration
Date:
Duration:
August 25, 2020
Duration:
41:50
Optimizing your automotive system with Jacinto 7 SoCs
Premium Reconfigurable Digital Cluster Powered by Jacinto™ DRA76x
Date:
Duration:
January 10, 2018
Duration:
01:27
Safety certifiable 2.5K resolution digital cluster rendering at 60fps with integrated driver monitoring system enabled by Jacinto DRA76x processor.
Design Your ASIL-B "Safety Certifiable" Reconfigurable Digital Cluster with "Jacinto 6"
Date:
Duration:
January 8, 2016
Duration:
01:17
Fully reconfigurable digital cluster running on “Jacinto 6" processor with ASIL-B certifiable software architecture on Green Hills Software Integrity RTOS
Jacinto 7 processors: Overview of SoC subsystems and features
Date:
Duration:
December 30, 2019
Duration:
17:08
An introduction to Jacinto™ 7 processors, including device architecture, key features and subsystems
TI's "Jacinto 6 Entry" Enables Safety Certifiable Digital Cluster at Optimized Cost
Date:
Duration:
January 7, 2017
Duration:
01:40
ASIL-B Certifiable, 1920x720 Digital Cluster rendering at 60fps using "Jacinto 6 Entry" DRA71x. Features Mentor Nucleus software architecture running on ARM Cor
"Jacinto 6 Entry" Drives Digital Cluster and Display Audio on Single Display
Date:
Duration:
January 7, 2017
Duration:
01:42
Fusion of digital instrument cluster and infotainment on a single display enabled by "Jacinto 6 Entry", with 60fps rendering and smartphone screen replication.
How the automotive cabin is transforming into an integrated cockpit: conversations on smart driving
Date:
Duration:
June 6, 2019
Duration:
09:08
The increased integration and personalization of the automotive cockpit is enhancing the driving experience. See what our experts have to say.
KeyStone I Training: C665x SoC Overview
Date:
Duration:
March 30, 2012
Duration:
10:26
The KeyStone C665x Architecture Overview provides a high-level view of the C665x device architecture, the processing and memory topologies, acceleration and interface improvements, as well as power saving and debug features.
KeyStone I C667x DSP SoC Architecture Overview
Date:
March 1, 2012
This module provides a high-level view of the KeyStone I C667x device architecture, the processing and memory topologies, acceleration and interface improvemen
KeyStone II DSP+ARM SoC Architecture Overview
Date:
November 1, 2012
This module provides a high-level view of the device architecture, including the C66x DSP and ARM Cortex-A15 processors, memory and transport topologies, netwo
KeyStone I C665x DSP SoC Architecture Overview
Date:
June 1, 2016
This module provides a high-level view of the KeyStone I C665x device architecture, the processing and memory topologies, acceleration and interface improvemen
Multi-camera systems with DS90UB960 deserializer hub and TDA SoCs: Demonstration
Date:
Duration:
April 23, 2019
Duration:
09:57
This training describes a demo system for testing DS90UB960 replicate mode in an end-to-end system from cameras through LVDS, video processing, and display.
Webinar - How to rapidly design the Power Supply Rails of Xilinx FPGAs & SoCs
Date:
Duration:
May 14, 2018
Duration:
46:56
How TI's Power Supply Reference Designs were used to quickly develop the power supply rails needed for Xilinx® Artix®-7, Spartan®-7, and Zynq®-7000 FPGAs & SoCs
A&D webinar series: Digital signal processors
Date:
Duration:
September 14, 2020
Duration:
46:36
DSP solutions for A&D designs.