CorePac: Achieving High Performance discusses how high performance can be achieved within each DSP core. Topics include CorePac architecture, Single Instruction Multiple Data (SIMD), memory access, and software pipelining.
Introduction to Interprocessor Communication (IPC) provides an overview of the hardware and software that transports data and/or signals between threads of execution in the KeyStone family of C66x multicore devices.
CorePac & Memory Subsystem provides a detailed look at the C66x memory subsystem including the Multicore Shared Memory Controller (MSMC), local & shared memory/cache control, extended memory, and memory protection.
Multicore Navigator: Packet DMA (PKTDMA) provides a detailed look at the infrastructure and functional aspects of the PKTDMA and provides information on programming PKTDMA through the use of registers and low level drivers.
Multicore Navigator: Queue Manager Subsystem (QMSS) provides a detailed look at the functional elements of the QMSS and provides information on programming QMSS through the use of registers and low level drivers.
Multicore Navigator Overview provides an introduction to the architecture and functional components of the Multicore Navigator, which includes the Queue Manager Subsystem (QMSS) and Packet DMA (PKTDMA).
The KeyStone C665x Architecture Overview provides a high-level view of the C665x device architecture, the processing and memory topologies, acceleration and interface improvements, as well as power saving and debug features.
Are you starting to engage with a Mainline Linux design and looking to better understand the role that the Yocto Project plays? This training session will provide a high level overview of the Yocto Project and explain TI's engagement with the Arago distribution.