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Explore PSpice for TI Design and Simulation Tool

With basic and advanced resources, this video series covers many of topics you need to start your design and simulation with the PSpice® for TI tool. These concise videos provide step-by-step instructions to help you understand features and functions of the tool in just a few minutes. Resources range from basic tool use to simulation set-up to Monte Carlo analysis to get you up and running on your next design. 

PSpice for TI: Advanced Analysis

Whether you are a first time user of the PSpice for TI design and simulation tool or an expert in PSpice simulation, these videos provide quick explination on how to perform advanced analysis within the tool.  Everything from sweep analysis to 3rd party tool import, we have the resources to make your simulation easy. 

PSpice for TI: Introduction

Starting your simulation does not need to be hard.  We've compiled a series of videos to help you get started quickly.  From a tool walkthrough to basic simulation tips, we have the resources to guide you through the PSpice for TI design and simulation tool. 

TI Precision Labs - Clocks and Timing: Noise in Clock and Timing Systems

This series of videos will cover topics around noise in Clock and Timing systems in both time and frequency domains. Subjects include definitions, characteristics and sources of jitter, phase noise figures of merit and the relationship to jitter. We will analyze system-level impairments such as excessive jitter/phase noise and PLL spurious noise for cause and effect by simulation and direct measurement examples.

TI Precision Labs - Clocks and Timing: System Design Considerations

The videos in this series will discuss distributed vs. centralized clock tree, synchronous vs. free-running designs and other selection criteria requirements to help narrow down a clock tree solution. We will discuss other design considerations including frequency planning, spurious and EMI noise reduction techniques, system clock optimization/tuning and clocking for JESD204 B/C systems.

TI Precision Labs - Clocks and Timing: Phase Lock Loop Fundamentals

This video series will explain the building blocks for Phase Lock Loops (PLL's) such as VCO’s, integer and fractional N frequency dividers, phase detectors and charge pumps. We will provide detailed examples of loop filter design and theory along with the effects of discrete sampling and multiple loops on PLL transient response.

TI Precision Labs - Clocks and Timing: Introduction

This series of videos gives an overview of clock and timing product types with a high-level discussion of architecture, functionality and features for each. The discussion will center around key performance metrics of Oscillators, Clock Buffers, Jitter Cleaners, PLL's, Network Synchronizers will highlight the key parameters and specifications. Applications case examples and tradeoffs between different clock tree building blocks will be presented to illustrate what type of product function is best suited to meet individual system needs.

TI Precision Labs - Clocks and Timing

Develop your clocks and timing expertise with our comprehensive curriculum that ranges from introductory to advanced topics from key terminology to design considerations. Our on-demand courses and tutorials pair theory and applied exercises to deepen the technical expertise of experienced engineers and accelerate the development of those early in their careers. 

New content will continue to be added to this series so be sure to check this page for the latest clock and timing lessons!

Precision Top

TI Precision Labs

TI Precision Labs (TIPL) is the most comprehensive online classroom for analog signal chain designers. From foundational knowledge to advanced concepts, our logical, sequenced and comprehensive teaching approach is both intuitive and practical. The training series, which includes videos and downloadable reference materials, will deepen the technical expertise of experienced engineers and accelerate the development of those early in their career.

Engineer It Analog How-to Training

Clock and timing

This series covers a wide variety of high-performance clock and timing topics, including controlling phase noise in communication systems, understanding clock jitter, simplifying clock-tree designs and more. 

Clocking Solutions for High Speed Multi-Channel Applications

Explore clocking solutions for a variety of high speed multi-channel applications. 

LVDS Training Series

LVDS Fundamentals

New to LVDS technology? Start with the LVDS fundamentals. 
M-LVDS backplanes

M-LVDS in Backplanes

Providing discussion on topics related to using M-LVDS in backplane applications supporting data rates up to 250 Mbps and are IEC 61000-4-2 compliant.

How to synchronize high speed multi-channel clocks?

Modern high speed end equipment's like oscilloscope, 5G wireless communication tester and RADAR requires multichannel transceiver system. The biggest challenge is to provide the high frequency, low phase noise, multiple synchronized clocks to each transceiver's data converters and local oscillator. This training will explain how to synchronize the high speed multi-channel clocks and expand for high channel count clocks requirement.
LVDS Series

LVDS Training Series

The LVDS training series is designed for learning the fundamentals of Low Voltage Differential Signalling technology. It begins with an overview of LVDS technology, and then expands on the advantages of using LVDS such as noise immunity, EMI reduction, low power, and etc. Next, M-LVDS and communication typologies commonly used with LVDS/M-LVDS Interface are explained. Typical use case of LVDS interface and how to calculate LVDS data rate are presented in this training series as well. 

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